• Journal of KIISE:Computing Practices and Letters
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• v.14 no.7
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• pp.636-645
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• 2008

OneNAND flash is a high-performance hybrid flash memory that combines the advantages of both NAND flash and NOR flash. OneNAND flash has not only all virtues of NAND flash but also greatly enhanced read performance which is considered as a downside of NAND flash. As a result, it is widely used in mobile applications such as mobile phones, digital cameras, PMP, and portable game players. However, most of the general purpose operating systems, such as Linux, can not exploit the read performance of OneNAND flash because of the restrictions imposed by their virtual memory system and block I/O architecture. In order to solve that problem, we suggest a new approach called virtual I/O segment. By using virtual I/O segment, the superior read performance of OneNAND flash can be exploited without modifying the existing block I/O architecture and MTD subsystem. Experiments by implementations show that this approach can reduce read latency of OneNAND flash as much as 54%.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.12
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• pp.72-82
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• 2014

Recently, the size of semiconductor industry market is constantly growing, due to the increase in diffusion of smart-phone, tablet PC and SSD(Solid State Drive). Also, it is expected that the demand for TLC NAND-type flash memory would gradually increase, with the recent release of TLC NAND-type flash memory in the SSD market. There have been a lot of studies on SLC NAND flash memory, but no research on TLC NAND flash memory has been conducted, yet. Also, a test of NAND-type flash memory is depending on a high-priced external equipment. Therefore, this study aims to suggest a structure for an autonomous test with no high-priced external test device by modifying the existing SLC NAND flash memory and MLC NAND flash memory test algorithms and patterns and applying them to TLC NAND flash memory.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.12
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• pp.683-695
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• 2007

NAND flash memory-based file systems cannot store their system-related information in the file system due to wear-leveling of NAND flash memory. This forces NAND flash memory-based file systems to scan the whole flash memory during their mounts. The mount time usually increases linearly according to the size of and the usage pattern of the flash memory. NAND flash memory has been widely used as the storage medium of mobile devices. Due to the fact that mobile devices have unstable power supply, the file system for NAND flash memory requires stable recovery mechanism from power failure. In this paper, we present design and implementation of a new NAND flash memory-based file system that provides fast mount and enhanced stability. Our file system mounts 19 times faster than JFFS2's and 2 times faster than YAFFS's. The stability of our file system is also shown to be equivalent to that of JFFS2.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.3 s.357
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• pp.43-51
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• 2007

OneNAND flash combines the advantages of NAND and NOR flash, and has become an alternative to the former. But the advanced features of OneNAND flash are not utilized effectively in demand paging systems designed for NAND flash. We propose delayed dual buffering, a demand paging system which fully exploits the random-access I/O interface and dual page buffers of OneNAND flash demand paging system. It effectively reduces the time of page transfer from the OneNAND page buffer to the main memory. On average, it achieves and 28.5% reduction in execution time and 4.4% reduction in paging system energy consumption.

• Journal of the Korea Society of Computer and Information
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• v.16 no.10
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• pp.1-10
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• 2011

There are the large overhead of block erase and page write operations in NAND flash memory, though it has low power consumption, cheap prices and a large storage. Due to the physical characteristics of NAND flash memory, overwrite operations are not permitted at the same location, so rewriting operation require after erase operation. it cause performance decrease of NAND flash memory. Using SRAM buffer in traditional NAND flash memory, it can not only reduce effective write operation but also guarantee fast memory access time. In this paper, we proposed the small SRAM buffer management system for reducing overhead of NAND flash memory, that is, erase and write operations. The proposed buffer system in a NAND flash memory consists of two parts, i.e., a fully associative temporal buffer with the small fetching block size and a fully associative spatial buffer with the large fetching block size. The temporal buffer have small fetching blocks that referenced from spatial buffer. When it happen write operations or erase operations in NAND flash memory, the related fetching blocks in temporal buffer include a page or a block are written in NAND flash memory at the same time. The writing and erasing counts in NAND flash memory can be reduced. According to the simulation results, although we have high miss ratios, write and erase operations can be reduced approximatively 58% and 83% respectively. Also the average memory access times are improved about 84% compared with the fully associative buffer with two sizes.

• KIPS Transactions on Computer and Communication Systems
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• v.3 no.5
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• pp.129-140
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• 2014

BIST(Built-in self test) is to detect various faults of the existing memory and BIRA(Built-in redundancy analysis) is to repair detected faults by allotting spare. Also, BISR(Built-in self repair) which integrates BIST with BIRA, can enhance the whole memory's yield. However, the previous methods were suggested for RAM and are difficult to diagnose disturbance that is NAND-type flash memory's intrinsic fault when used for the NAND-type flash memory with different characteristics from RAM's memory structure. Therefore, this paper suggests a BISD(Built-in self diagnosis) to detect disturbance occurring in the NAND-type flash memory and to diagnose the location of fault, and BISR to repair faulty blocks.

• Proceedings of the Korean Information Science Society Conference
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• 2012.06a
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• pp.251-252
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• 2012

본 논문은 기존 Legacy NAND의 성능을 향상시키기 위해 제안된 ONFI (Open NAND Flash Interface) NAND의 특성을 지원하는 컨트롤러를 구현하고, 실제 테스트 보드 제작 및 실험 환경을 구축하여 성능을 측정하였다. 그 결과 인터페이스 속도가 기존 Legacy NAND에 비해 약 6배 증가하였다. 또한 읽기 속도의 경우 약 3배의 성능 향상이 있었다.

• Information and Communications Magazine
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• v.32 no.6
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• pp.16-22
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• 2015

NAND flash 메모리의 집적도를 높이기 위한 주요 기술로, 데이터가 저장되는 cell 자체의 크기를 줄여주는 미세 공정화와 cell 당 저장되는 정보량을 늘려주는 멀티-레벨(multi-level)화가 사용되고 있다. 이러한 기술의 적용은 NAND flash 메모리 자체의 오류를 증가시키게 되므로, NAND flash 메모리 기반 데이터 저장 장치의 신뢰성을 높은 수준으로 유지하기 위해서는 우수한 정정 능력을 갖는 ECC(error control code) 를 사용하는 것이 필수적이다. 본고에서는 NAND flash 메모리의 신뢰성 특성과 함께 NAND flash 메모리를 사용하는 데이터 저장 장치에서의 ECC의 응용에 대해서 살펴보고자 한다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.8
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• pp.1635-1641
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• 2011

In this paper, we research the method for HDD I/O Performance improvement by Filter Driver & NAND FLASH Memory. This paper was started from NAND Flash Memory can not be replaced by HDD because of high cost. So We consider that using NAND Flash Memory as cache for HDD. It can be achieved high HDD Performance through Filter Driver by low cost.

• Journal of Internet Computing and Services
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• v.6 no.4
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• pp.47-58
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• 2005

There are two major type of flash memory products, namely, NAND-type and NOR-type flash memory. NOR-type flash memory is generally deployed as ROM BIOS code storage because if offers Byte I/O and fast read operation. However, NOR-type flash memory is more expensive than NAND-type flash memory in terms of the cost per byte ratio, and hence NAND type flash memory is more widely used as large data storage such as embedded Linux file systems. In this paper, we designed an efficient flash memory file system based an Embedded system and presented to make up for reduced to Swapping a weak System Performance to flash file system using NAND-type flash memory, then proposed Swapping algorithm insured to an Execution time. Based on Implementation and simulation studies, Then, We improved performance bases on NAND-type flash memory to the requirement of the embedded system.