• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.3 s.345
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• pp.9-14
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• 2006

The dependence of NBTI lifetime on the BEOL processes such as sintering gas type and passivation layer has been characterized in depth. Then, optimized BEOL process scheme is proposed to improve NBTI lifetime. NBTI showed degradation due to the plasma enhanced nitride (PE-SiN) passivation film and $H_2$ sintering anneal. Then, new process scheme of $N_2$ annealing instead of $H_2$ annealing prior to PE-SiN deposition is proposed. The proposed BEOL process flow showed that NBTI lifetime can be improved a lot without degradation of device performance and NMOS hot carrier reliability.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.893-896
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• 2003

Plasma polymerized para-xylene (PPpX) thin films deposited by plasma enhanced chemical vapor deposition (PECVD) were used to passivate the organic light emitting diodes (OLEDs). For OLEDs, indium tin oxide (ITO), N,N'-diphenyl-N,N'-bis(3-methylphenyl)-1,1'-diphenyl-4,4'-diamine (TPD), tris(8-hydroxyquinoline) aluminum $(Alq_{3})$ and aluminum (Al) were used as the anode, the hole transport layer (HTL), the emitting layer (EML) and the cathode, respectively. The OLED device with the PPpX passivation film (passivated device) showed similar electrical and optical characteristics to those of the OLED device without the PPpX passivation film (control device), indicating that the PECVD process did not degrade the performance of the OLEDs notably. The lifetime of the passivated device was two times longer than that of the control device. Passivation of OLEDs with PPpX films also suppressed the growth of dark spots. The density and size of dark spots of the passivated device were much smaller than those of the control device.

• Journal of the Semiconductor & Display Technology
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• v.12 no.3
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• pp.47-51
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• 2013

Current research trends of solar cells has focused on the high conversion efficiency and low-cost production technology. Passivation technology that can be easily adapted to mass production. Therefore, this study conducted experiments with aim of the following two methods for the fabrication of high-efficiency crystalline silicon solar cells. In the first task, an attempt is formation of local Al-BSF to a number of locally doped dots to increase the conversion efficiency of solar cells to reduce the loss of $V_{oc}$ overcome. The second major task, rear surface apply in $Al_2O_3/SiN_x$ stack layer, $Al_2O_3$ prominent negative fixed charge characteristics. As the result of task, Local Al-BSF and $Al_2O_3/SiN_x$ stack layer applied to the p-type single crystalline silicon solar cells, the average $V_{oc}$ of 644mV, $I_{sc}$ of 918mV and conversion efficiency of 18.70% were obtained.

• Transactions on Electrical and Electronic Materials
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• v.16 no.5
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• pp.227-233
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• 2015

To reduce the cost of solar electricity, the crystalline-silicon (c-Si) photovoltaic industry is moving toward the use of thinner wafers (100 μm to 200 μm) to achieve a high efficiency. In this field, it is imperative to achieve an effective passivation method to reduce the electronic losses at the c-Si interface. In this article, we review the most promising surface passivation schemes that are available for high-efficiency solar cells.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.892-896
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• 2005

In this paper, key issues of stainless steel foil substrates for display applications have been described. We studied and analyzed technical issues on substrate passivation/planarization to control surface roughness and capacitive coupling from conductive substrates. A thick (either multiple or single) passivation/planarization layer needs to be applied on the nonelectronic-grade stainless steel substrate to provide a smooth surface and electrical insulation from the conductive substrate. Especially for large size, high-resolution display applications, low k and thick passivation/planarization layers should be used for appropriate capacitive coupling. Based on our initial study, a unit area capacitance of less than $2nF/cm^2$ of passivation/planarization layers is needed for 32" HD TV OLED displays.

• Korean Journal of Materials Research
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• v.23 no.1
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• pp.35-40
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• 2013

In this study, the influence on the surface passivation properties of crystalline silicon according to silicon wafer thickness, and the correlation with a-Si:H/c-Si heterojunction solar cell performances were investigated. The wafers passivated by p(n)-doped a-Si:H layers show poor passivation properties because of the doping elements, such as boron(B) and phosphorous(P), which result in a low minority carrier lifetime (MCLT). A decrease in open circuit voltage ($V_{oc}$) was observed when the wafer thickness was thinned from $170{\mu}m$ to $50{\mu}m$. On the other hand, wafers incorporating intrinsic (i) a-Si:H as a passivation layer showed high quality passivation of a-Si:H/c-Si. The implied $V_{oc}$ of the ITO/p a-Si:H/i a-Si:H/n c-Si wafer/i a-Si:H/n a-Si:H/ITO stacked layers was 0.715 V for $50{\mu}m$ c-Si substrate, and 0.704 V for $170{\mu}m$ c-Si. The $V_{oc}$ in the heterojunction solar cells increased with decreases in the substrate thickness. The high quality passivation property on the c-Si led to an increasing of $V_{oc}$ in the thinner wafer. Short circuit current decreased as the substrate became thinner because of the low optical absorption for long wavelength light. In this paper, we show that high quality passivation of c-Si plays a role in heterojunction solar cells and is important in the development of thinner wafer technology.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.24 no.3
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• pp.106-110
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• 2014

The passivation property of $Al_2O_3$ thin film formed using atomic layer deposition (ALD) for the application of crystalline Si solar cells was investigated using microwave photoconductance decay (${\mu}$-PCD). After post-annealing at $400^{\circ}C$ for 5 min, $Al_2O_3$ thin film exhibited the structural stability having amorphous nature without the interfacial reaction between $Al_2O_3$ and Si. The post-annealing at $400^{\circ}C$ for 5 min led to an increase in the relative effective lifetime of $Al_2O_3$ thin film. This could be associated with the field effective passivation combined with surface passivation of textured Si. The capacitance-voltage (C-V) characteristics of the metal-oxide-semiconductor (MOS) with $Al_2O_3$ thin film post-annealed at $400^{\circ}C$ for 5 min was carried out to evaluate the negative fixed charge of $Al_2O_3$ thin film. From the relationship between flatband voltage ($V_{FB}$) and equivalent oxide thickness (EOT), which were extracted from C-V characteristics, the negative fixed charge of $Al_2O_3$ thin film was calculated to be $2.5{\times}10^{12}cm^{-2}$, of which value was applicable to the passivation layer of n-type crystalline Si solar cells.

• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.172-175
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• 2009

n-type crystalline silicon wafers were passivated with intrinsic a-Si:H thin films on both sides using HWCVD. Minority carrier lifetime measurement was used to verify interface passivation properties between a-Si:H thin film and crystalline Si wafer. Thin film interface characteristics were investigated depending on $H_2/SiH_4$ ratio and hot wire deposition temperature. Vacuum annealing were processed after deposition a-Si:H thin films on both sides to investigate thermal effects from post process steps. We noticed the effect of interface passivation properties according to $H_2/SiH_4$ ratio and hot wire deposition temperature, and we had maximum point of minority carrier lifetime at H2/SiH4 10 ratio and $1600^{\circ}C$ wire temperature.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.12
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• pp.68-74
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• 1998

Improved performance and suppressed short-channel effects of polysilicon thin film transistors (poly-Si TFTs) with very thin electron cyclotron resonance (ECR) $N_2$O-plasma gate oxide have been investigated. Poly-Si TFTs with ECR $N_2$O-plasma oxide ($N_2$O-TFTs) show better performance as well as suppressed short-channel effects than those with conventional thermal oxide. The fabricated $N_2$O-TFTs do not show threshold voltage reduction until the gate length is reduced to 3 ${\mu}{\textrm}{m}$ for n-channel and 1 ${\mu}{\textrm}{m}$ for p-channel, respectively. The improvements are due to the smooth interface, passivation effects, and strong Si ≡ N bonds.

• Journal of Electrical Engineering and Technology
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• v.8 no.5
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• pp.1157-1162
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• 2013

We proposed AlGaN/GaN high-electron-mobility transistors (HEMTs) using thermal oxidation for NiOx passivation. Auger electron spectroscopy, secondary ion mass spectroscopy, and pulsed I-V were used to study oxidation features. The oxidation process diffused Ni and O into the AlGaN barrier and formed NiOx on the surface. The breakdown voltage of the proposed device was 1520 V while that of the conventional device was 300 V. The gate leakage current of the proposed device was 3.5 ${\mu}A/mm$ and that of the conventional device was 1116.7 ${\mu}A/mm$. The conventional device exhibited similar current in the gate-and-drain-pulsed I-V and its drain-pulsed counterpart. The gate-and-drain-pulsed current of the proposed device was about 56 % of the drain-pulsed current. This indicated that the oxidation process may form deep states having a low emission current, which then suppresses the leakage current. Our results suggest that the proposed process is suitable for achieving high breakdown voltages in the GaN-based devices.