• Title/Summary/Keyword: Multipliers

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Efficient IFFT Design Using Mapping Method (Mapping 기법을 이용한 효율적인 IFFT 설계)

  • Jang, In-Gul;Kim, Yong-Eun;Chung, Jin-Gyun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.11
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    • pp.11-18
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    • 2007
  • FFT(Fast Fourier Transform) processor is one of the key components in the implementation of OFDM systems such as WiBro, DAB and UWB systems. Most of the researches on the implementation of FFT processors have focused on reducing the complexities of multipliers, memory and control circuits. In this paper, to reduce the memory size required for IFFT(Inverse Fast Fourier Transform), we propose a new IFFT design method based on a mapping method. By simulations, it is shown that the reposed IFFT design method achieves more than 60% area reduction and much SQNR(Signal-to-Quantization-Noise Ratio) gain compared with previous IFFT circuits.

Type II Optimal Normal Basis Multipliers in GF(2n) (타입 II 최적 정규기저를 갖는 GF(2n)의 곱셈기)

  • Kim, Chang Han;Chang, Nam Su
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.25 no.5
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    • pp.979-984
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    • 2015
  • In this paper, we proposed a Semi-Systolic multiplier of $GF(2^n)$ with Type II optimal Normal Basis. Comparing the complexity of the proposed multiplier with Chiou's multiplier proposed in 2012, it is saved $2n^2+44n+26$ in total transistor numbers and decrease 4 clocks in time delay. This means that, for $GF(2^{333})$ of the field recommended by NIST for ECDSA, the space complexity is 6.4% less and the time complexity of the 2% decrease. In addition, this structure has an advantage as applied to Chiou's method of concurrent error detection and correction in multiplication of $GF(2^n)$.

Statistical comparison of morphological dilation with its equivalent linear shift-invariant system:case of memoryless uniform soruces (무기억 균일 신호원에 대한 수리 형태론적인 불림과 등가 시스템의 통계적 비교)

  • 김주명;최상신;최태영
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.34S no.2
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    • pp.79-93
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    • 1997
  • This paper presents a linear shift-invariant system euqivalent to morphological dilation for a memoryless uniform source in the sense of the power spectral density function, and comares it with dialtion. This equivalent LSI system is found through spectral decomposition and, for dilation and with windwo size L, it is shown to be a finite impulse response filter composed of L-1 delays, L multipliers and three adders. Th ecoefficients of the equivalent systems are tabulated. The comparisons of dilation and its equivalent LSI system show that probability density functions of the output sequences of the two systems are quite different. In particular, the probability density functon from dilation of an independent and identically distributed uniform source over the unit interval (0, 1) shows heavy probability in around 1, while that from the equivalent LSI system shows probability concentration around themean vlaue and symmetricity about it. This difference is due to the fact that dilation is a non-linear process while the equivalent system is linear and shift-ivariant. In the case that dikation is fabored over LSI filters in subjective perforance tests, one of the factors can be traced to this difference in the probability distribution.

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High-Speed Low-Complexity Reed-Solomon Decoder using Pipelined Berlekamp-Massey Algorithm and Its Folded Architecture

  • Park, Jeong-In;Lee, Ki-Hoon;Choi, Chang-Seok;Lee, Han-Ho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.3
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    • pp.193-202
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    • 2010
  • This paper presents a high-speed low-complexity pipelined Reed-Solomon (RS) (255,239) decoder using pipelined reformulated inversionless Berlekamp-Massey (pRiBM) algorithm and its folded version (PF-RiBM). Also, this paper offers efficient pipelining and folding technique of the RS decoders. This architecture uses pipelined Galois-Field (GF) multipliers in the syndrome computation block, key equation solver (KES) block, Forney block, Chien search block and error correction block to enhance the clock frequency. A high-speed pipelined RS decoder based on the pRiBM algorithm and its folded version have been designed and implemented with 90-nm CMOS technology in a supply voltage of 1.1 V. The proposed RS(255,239) decoder operates at a clock frequency of 700 MHz using the pRiBM architecture and also operates at a clock frequency of 750 MHz using the PF-RiBM, respectively. The proposed architectures feature high clock frequency and low-complexity.

Fast Sequential Optimal Normal Bases Multipliers over Finite Fields (유한체위에서의 고속 최적정규기저 직렬 연산기)

  • Kim, Yong-Tae
    • The Journal of the Korea institute of electronic communication sciences
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    • v.8 no.8
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    • pp.1207-1212
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    • 2013
  • Arithmetic operations over finite fields are widely used in coding theory and cryptography. In both of these applications, there is a need to design low complexity finite field arithmetic units. The complexity of such a unit largely depends on how the field elements are represented. Among them, representation of elements using a optimal normal basis is quite attractive. Using an algorithm minimizing the number of 1's of multiplication matrix, in this paper, we propose a multiplier which is time and area efficient over finite fields with optimal normal basis.

Design of UHF CMOS Front-ends for Near-field Communications

  • Hamedi-Hagh, Sotoudeh;Tabesh, Maryam;Oh, Soo-Seok;Park, Noh-Joon;Park, Dae-Hee
    • Journal of Electrical Engineering and Technology
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    • v.6 no.6
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    • pp.817-823
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    • 2011
  • This paper introduces an efficient voltage multiplier circuit for improved voltage gain and power efficiency of radio frequency identification (RFID) tags. The multiplier is fully integratable and takes advantage of both passive and active circuits to reduce the required input power while yielding the desired DC voltage. A six-stage voltage multiplier and an ultralow power voltage regulator are designed in a 0.13 ${\mu}m$ complementary metal-oxide semiconductor process for 2.45 GHz RFID applications. The minimum required input power for a 1.2 V supply voltage in the case of a 50 ${\Omega}$ antenna is -20.45 dBm. The efficiency is 15.95% for a 1 $M{\Omega}$ load. The regulator consumes 129 nW DC power and maintains the reference voltage in a 1.1% range with $V_{dd}$ varying from 0.8 to 2 V. The power supply noise rejection of the regulator is 42 dB near a 2.45 GHz frequency and performs better than -32 dB from 100 Hz to 10 GHz frequencies.

Radix-2 Based Structure for Ultra-long FFT (Ultra-long FFT를 위한 Radix-2 기반 구조)

  • Kang, Hyeong-Ju
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.9
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    • pp.2121-2126
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    • 2013
  • This paper compares radix-2 based structures for 32768-point FFT. Radix-$2^k$ structures have been widely used because the butterfly is simple and the number of multipliers can be reduced in those structures. This paper applied various radix-$2^k$ structures to 32768-point FFT that is representing ultra-long FFT. The ultra-long FFT has been studied much recently. This paper shows that the radix-$2^4$ structure is the most adequate because it shows the smallest complexity in the synthesis and the best SQNR performance. should be placed here.

Impact Analysis on the Regional Economy Affected by Environmental Regulations (환경규제가 지역경제에 미치는 파급효과 분석)

  • 김호언
    • Journal of the Korean Regional Science Association
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    • v.15 no.3
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    • pp.1-13
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    • 1999
  • Since the 1990's, the most important environmental issue on the earth is characterized by "global worming problem". The United Nations Framework Convention on Climate Change (UNFCCC) plays an significant role to solve this problem on a worldwide scale. The main purpose of this paper is to analyse the impact of $CO_2$ reduction on the Daegu regional economy through 1995 regional input-output coefficients derived from the 1995 national input coefficients table by using non-survey method. The sectoral impacts on output, income, and employment were computed under the decline-unequalized assumption in final demand influenced by $CO_2$ reduction. This article has six main sections. Section 1 is an introduction to this paper. Section 2 explains briefly the derivation method of the regional technical coefficients. Section 3 describes the model building through input-output multipliers. In section 4 regional data on output, income, employment and final demand are computed to estimate the regional impacts. Section 5 deals with impact analysis on the Daegu economy. Section 6 contains a brief summary and concludintg remarks. The research findings of this study can be summarized as follows. In 1995, under the assumption of 10% decrease on an average in final demand sectors, the economy of the region studied decreased \3600 billion of output, ₩1114 billion of income, and 49919 man-years of employment. The percent ratios of each value to the total showed 9.4%, 9.7%, and 9.2%, respectively. The dominant sectors associated with impact analysis within the region are chemicals and chemical products, paper, printing and publishing, and textiles and leather, etc; nevertheless, the least dominant sector is non-metallic mineral products. products.

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Multiscale analysis using a coupled discrete/finite element model

  • Rojek, Jerzy;Onate, Eugenio
    • Interaction and multiscale mechanics
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    • v.1 no.1
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    • pp.1-31
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    • 2008
  • The present paper presents multiscale modelling via coupling of the discrete and finite element methods. Theoretical formulation of the discrete element method using spherical or cylindrical particles has been briefly reviewed. Basic equations of the finite element method using the explicit time integration have been given. The micr-macro transition for the discrete element method has been discussed. Theoretical formulations for macroscopic stress and strain tensors have been given. Determination of macroscopic constitutive properties using dimensionless micro-macro relationships has been proposed. The formulation of the multiscale DEM/FEM model employing the DEM and FEM in different subdomains of the same body has been presented. The coupling allows the use of partially overlapping DEM and FEM subdomains. The overlap zone in the two coupling algorithms is introduced in order to provide a smooth transition from one discretization method to the other. Coupling between the DEM and FEM subdomains is provided by additional kinematic constraints imposed by means of either the Lagrange multipliers or penalty function method. The coupled DEM/FEM formulation has been implemented in the authors' own numerical program. Good performance of the numerical algorithms has been demonstrated in a number of examples.

A DUAL ITERATIVE SUBSTRUCTURING METHOD WITH A SMALL PENALTY PARAMETER

  • Lee, Chang-Ock;Park, Eun-Hee
    • Journal of the Korean Mathematical Society
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    • v.54 no.2
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    • pp.461-477
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    • 2017
  • A dual substructuring method with a penalty term was introduced in the previous works by the authors, which is a variant of the FETI-DP method. The proposed method imposes the continuity not only by using Lagrange multipliers but also by adding a penalty term which consists of a positive penalty parameter ${\eta}$ and a measure of the jump across the interface. Due to the penalty term, the proposed iterative method has a better convergence property than the standard FETI-DP method in the sense that the condition number of the resulting dual problem is bounded by a constant independent of the subdomain size and the mesh size. In this paper, a further study for a dual iterative substructuring method with a penalty term is discussed in terms of its convergence analysis. We provide an improved estimate of the condition number which shows the relationship between the condition number and ${\eta}$ as well as a close spectral connection of the proposed method with the FETI-DP method. As a result, a choice of a moderately small penalty parameter is guaranteed.