• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1998.10a
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• pp.447-452
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• 1998

A fault is considered as a variation of physical parameters; therefore the design of fault detection and identification(FDI) can be reduced to the parameter identification of a non linear system and to the association of the set of the estimated parameters with the mode of faults. ANFIS(Adaptive Neuro-Fuzzy Inference System) which contains multiple linear models as consequent part is used to model non linear systems. In this paper, we proposes an FDI system for non linear systems using ANFIS. The proposed diagnositc system consists of two ANFISs which operate in two different modes (parallel-and series-parallel mode). It generates the parameter residuals associated with each modes of faults which can be further processed by additional RBF (Radial Basis function) network to identify the faults. The proposed FDI scheme has been tested by simultation on a two-tank system

• Proceedings of the KIEE Conference
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• 2004.11b
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• pp.51-53
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• 2004

In this paper, we are going to propose the new algorithms to detect, classify, discriminate the transient and the reflected signal from noise and thus discriminate the fault section and locale the fault accurately on underground power cable system. Actually, at this system, it's very difficult to discriminate the transient because of the reflected signal including many noises. Therefore, how to solve the noise interference is a big problem. In this paper, authors present a solution based on multiple scales correlation of the transient using stationary wavelet transform. It's simple, quick and straightforward. For applying all algorithms, we just use the signal captured in single end.

• The Transactions of the Korea Information Processing Society
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• v.4 no.1
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• pp.311-323
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• 1997

This paper presents a fast fault simulation system for detecting stuck-at faults in mixed-level combinational logic circuits with gale level and switch -level primitives. For a practical fault simulator, the types are not restricted to static switch-level and/or gate-level circuits, but include dynamic switch-level circuits. To efficiently handle the multiple signal contention problems at wired logic elements, we propose a six-valued logic system and its logic calculus which are used together with signal strength information. As a basic algorithm for the fault simulation process, a well -known gate-level parallel pattern single fault propagation(PPSFP) technique is extended to switch-level circuits in order to handle pass-transistor circuits and precharged logic circuits as well as static CMOS circuits. Finally, we demonstrate the efficiency of our system through the experimental results for switch-level ISCAS85 benchmark combinational circuits and various industrial mixed-level circuits.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.4
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• pp.366-376
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• 2002

A sensor fault detection and isolation scheme(SFDIS) is adopted to improve the reliability of direct torque controlled induction motor drives and the experimental results are discussed. Major contributions include: experimental analysis of a few important sensor faults. design and implementation of the proposed SFDIS, and the fault tolerant control system(FTCS). Although the adopted SFDIS employs only one observer for residual generation, the system has the function of fault isolation that only multiple observer schemes can have. To verify the performance of the proposed scheme, the speed control system is designed for the 2.2kW direct torque controlled Induction motor. Hardware of the control system consists of a control board using TMS320OVC33 and a power stack using IPM. Experimental results for various type of sensor faults show the effectiveness of the SFDIS and the FTCS.

• Progress in Superconductivity
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• v.7 no.2
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• pp.114-119
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• 2006

High critical current density, high n value, multiple faults endurances, and fast recovery characteristics of YBCO thin films are very attractive characteristics for developing resistive type superconducting fault current limiters. But due to the limited current and voltage ratings of one YBCO module, it is needed to construct series and parallel module connections for high capacity electric networks. Especially for distribution network, more than 30 units should be connected in series to meet voltage level. So in order to construct distribution-level superconducting fault current limiter, simultaneous quench in one YBCO thin films should be realized, and furthermore, quench should be occurred in all fault current limiting units equally to avoid local heating and failures. In this paper, we proposed optimum design of YBCO thin films for fault current limiting module and technical method using shunt resistor to achieve simultaneous quench between multi current limiting units. From the analytical and the experimental results, optimal current path and thickness of shunt material was determined for YBCO thin films and shunt resistor between modules was developed. Finally, 14 kV one phase resistive fault current limiter using multi YBCO thin films was constructed and it was possible to get satisfactory test results.

• Journal of Electrical Engineering and Technology
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• v.9 no.3
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• pp.827-834
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• 2014

In order to meet the low voltage ride-through requirement in a grid code, a wind power plant (WPP) has to stay connected to a grid, supporting the voltage recovery for a grid fault. To do this, a plant-level controller as well as a wind generator (WG) controller is essential. The dynamic response of a WPP should be analyzed in order to design a plant-level controller. The dynamic response of a WPP for a grid fault is the collective response of all WGs, which depends on the wind speed approaching the WG. Thus, the dynamic response of a WPP should be analyzed by taking the wake effect into consideration, because different wind speeds at WGs will result in different responses of the WPP. This paper analyzes the response of a doubly fed induction generator (DFIG)-based offshore WPP with a grid fault taking into account the wake effect. To obtain the approaching wind speed of a WG in a WPP, we considered the cumulative impact of multiple shadowing and the effect of the wind direction. The voltage, reactive power, and active power at the point of common coupling of a 100 MW DFIG-based offshore WPP were analyzed during and after a grid fault under various wind and fault conditions using an EMTP-RV simulator. The results clearly demonstrate that not considering the wake effect leads to significantly different results, particularly for the reactive power and active power, which could potentially lead to incorrect conclusions and / or control schemes for a WPP.

• Journal of the Mineralogical Society of Korea
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• v.18 no.3 s.45
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• pp.205-214
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• 2005

Some Quaternary faults developed in the eastern block of the Ulsan fault are Gaegok 1, Gaegok 2, Singye, Madong, Wonwonsa and Jinhyeon faults, which are characterized by thin gouge and narrow cataclasitic tones. This study was performed to emphasize the role of mineral alteration and microtexture in response to hydrothermal alteration of fault gouges during fault activity, using XRD, EPMA, BSE (backscattered electron image), and K-Ar age dating methods. Alteration minerals in fault gouges were formed in the age range of $44.3\~28.9Ma$ by hydrothermal alteration attributed to fault activity. XRD results show that fault gouges consist predominantly of clay minerals, quartz and feldspars. Clay minerals formed in the gouge zones are mainly composed of smectite with trace chlorite, illite and kaolinite. The evidence to support the hydrothermal alteration of preexisting minerals due to fault activity are easily recognized at the host rocks in contact with gouges zones. Injected gouge and calcite veins indicate that they were originated from multiple deformation by repeated fault activity. Gouge with green or greenish grey color, for example Jinhyeon fault, contains higher $Al_2O_3$ and lower MgO and CaO compared to those with reddish color. Various colors of fault gouge are intimately related to the chemical compositions of main constituent mineral as well as mineral assemblage.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.9
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• pp.14-24
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• 2009

Memory cell array and peripheral circuits are designed for system on panel style frame buffer. Moreover, a parallel test methodology to test multiple blocks of memory cells is proposed to overcome low yield of system on panel processing technologies. It is capable of faster fault detection compared to conventional memory tests and also applicable to the tests of various embedded memories and conventional SRAMs. The various patterns of conventional test vectors can be used to enhance fault coverage. The proposed testing method is also applicable to hierarchical bit line and divided word line, one of design trends of recent memory architectures.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.16 no.4
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• pp.238-245
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• 2016

Inverters are considered the basic building blocks of industrial electrical drive systems that are widely used for various applications; however, the failure of electronic switches mainly affects the constancy of these inverters. For safe and reliable operation of an electrical drive system, faults in power electronic switches must be detected by an efficient system that is capable of identifying the type of faults. In this paper, an open switch fault identification technique for a three-phase inverter is presented. Single, double, and triple switching faults can be diagnosed using this method. The detection mechanism is based on stator current analysis. Discrete wavelet transform (DWT) using Daubechies is performed on the Clarke transformed (-) stator current and features are extracted from the wavelets. An artificial neural network is then used for the detection and identification of faults. To prove the feasibility of this method, a Simulink model of the DWT-based feature extraction scheme using a neural network for the proposed fault detection system in a three-phase inverter with an induction motor is briefly discussed with simulation results. The simulation results show that the designed system can detect faults quite efficiently, with the ability to differentiate between single and multiple switching faults.

• Journal of KIISE:Computer Systems and Theory
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• v.29 no.3
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• pp.117-124
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• 2002

This paper proposes a fault-tolerant multicasting algorithm employing the region encoding scheme in multistage interconnection networks (MIN's) containing multiple faulty switching elements. After classifying all switching elements into two subsets with equal sizes in MIN, the proposed algorithm can tolerate the faulty pattern where every fault is contained in the same subset. In order to send a multicast message to its destinations detouring faults, the proposed algorithm uses the recursive scheme that recirculates it through MIN, We prove that this algorithm can route any multicast message in only two passes through the faulty MIN.