• Title/Summary/Keyword: Multilevel inverters.

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New Generalized SVPWM Algorithm for Multilevel Inverters

  • Kumar, A. Suresh;Gowri, K. Sri;Kumar, M. Vijay
    • Journal of Power Electronics
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    • v.18 no.4
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    • pp.1027-1036
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    • 2018
  • In this paper a new generalized space vector pulse width modulation scheme is proposed based on the principle of reverse mapping to drive the switches of multilevel inverters. This projected scheme is developed based on the middle vector of the subhexagon which holds the tip of the reference vector, which plays a major role in mapping the reference vector. A new approach is offered to produce middle vector of the subhexagon which holds tip of the reference vector in the multilevel space vector plane. By using middle vector of the subhexagon, reference vector is linked towards the inner two level sub-hexagon. Then switching vectors, switching sequence and dwell times corresponding to a particular sector of a two-level inverter are determined. After that, by using the two level stage findings, the switching vectors related to exact position of the reference vector are directly generated based on principle of the reverse mapping approach and do not need to be found at n level stage. In the reverse mapping principle, the middle vector of subhexagon is added to the formerly found two level switching vectors. The proposed generalized algorithm is efficient and it can be applied to an inverter of any level. In this paper, the proposed scheme is explained for a five-level inverter and the performance is analyzed for five level and three level inverters through MATLAB. The simulation results are validated by implementing the propose scheme on a V/f controlled three-level inverter fed induction motor using dSPACE control desk.

Speed control of an IPMSM using multilevel inverters based on next generation high speed railway system (멀티레벨 인버터를 적용한 차세대 고속전철 구동용 IPMSM의 속도 제어)

  • Kwon, Soon-Hwan;Jin, Kang-Hwan;Park, Dong-Kyu;Li, Wei;Kim, Yoon-Ho
    • Proceedings of the KSR Conference
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    • 2011.05a
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    • pp.1473-1479
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    • 2011
  • In this paper, speed control of IPMSM drives for the next generation domestic high speed railway system using multilevel inverter is presented. Multilevel inverter is suitable for the high-voltage high-capacity motor drive system because noise and switching frequency of power semiconductor devices is reduced. For the speed control of IPMSM using multilevel inverter, maximum torque control is applied in a constant torque region, and field weakening control is applied in a constant power region. Simulation programs based on Matlab/Simulink are developed. Finally the designed system is verified by simulation and their characteristics are analyzed by the simulation results.

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Output Voltage Control in a Serise Multilevel H-bridge Inverter with SHE-PWM Method (직렬 멀티레벨 H-bridge inverter에서 SHE-PWM방식을 사용한 출력 전 압의 제어)

  • Kim J.Y.;Jeong S.G.
    • Proceedings of the KIPE Conference
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    • 2003.07a
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    • pp.1-4
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    • 2003
  • This paper proposes a method of voltage control for three-phase multilevel H-bridge inverters with selective harmonic elimination (SHE) PWM The full-bridge configuration of H-bridge inverter cells enables voltage control with a fixed PWM pattern by means of phase shifting between the legs, which greatly simplifies the control while maintaining the harmonic elimination characteristics. The series combination of the cells in multilevel configuration can be exploited to further improve the hormonic elimination characteristics with proper phase shifting between the ceil volitage. A complexor-based control method is introduced to control the magnitude and phase angle of cell voltages that form three-phase multilevel output voltages. Simulation results show that the proposed method along with SHE PWM would provide satisfactory performance in spite of its simplicity.

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New Three-Phase Multilevel Inverter with Shared Power Switches

  • Ping, Hew Wooi;Rahim, Nasrudin Abd.;Jamaludin, Jafferi
    • Journal of Power Electronics
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    • v.13 no.5
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    • pp.787-797
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    • 2013
  • Despite the advantages offered by multilevel inverters, one of the main drawbacks that prevents their widespread use is their circuit complexity as the number of power switches employed is usually high. This paper presents a new multilevel inverter topology with a considerable reduction in the number of power switches used through the switch-sharing approach. The fact that the proposed inverter applies two bidirectional power switches for sharing among the three phases does not prevent it from producing seven levels in the line-to-line output voltage waveforms. A modified scheme of space vector modulation via the application of virtual voltage vectors is developed to generate the PWM signals of the power switches. The performance of the proposed inverter is investigated through MATLAB/SIMULINK simulations and is practically tested using a laboratory prototype with a DSP-based modulator. The results demonstrate the satisfactory performance of the inverter and verify the effectiveness of the modulation method.

A Hysteresis Current Controller for PV-Wind Hybrid Source Fed STATCOM System Using Cascaded Multilevel Inverters

  • Palanisamy, R.;Vijayakumar, K.
    • Journal of Electrical Engineering and Technology
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    • v.13 no.1
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    • pp.270-279
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    • 2018
  • This paper elucidates a hysteresis current controller for enhancing the performance of static synchronous compensator (STATCOM) using cascaded H-bridge multilevel inverter. Due to the rising power demand and growing conventional generation costs a new alternative in renewable energy source is gaining popularity and recognition. A five level single phase cascaded multilevel inverter with two separated dc sources, which is energized by photovoltaic - wind hybrid energy source. The voltages across the each dc source is balanced and standardized by the proposed hysteresis current controller. The performance of STATCOM is analyzed by connecting with grid connected system, under the steady state & dynamic state. To reduce the Total Harmonic Distortion (THD) and to improve the output voltage, closed loop hysteresis current control is achieved using PLL and PI controller. The performance of the proposed system is scrutinized through various simulation results using matlab/simulink and hardware results are also verified with simulation results.

A New Symmetric Multilevel Inverter Topology Using Single and Double Source Sub-Multilevel Inverters

  • Ramani, Kannan;Sathik, Mohd. Ali Jagabar;Sivakumar, Selvam
    • Journal of Power Electronics
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    • v.15 no.1
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    • pp.96-105
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    • 2015
  • In recent years, the multilevel converters have been given more attention due to their modularity, reliability, failure management and multi stepped output waveform with less total harmonic distortion. This paper presents a novel symmetric multilevel inverter topology with reduced switching components to generate a high quality stepped sinusoidal voltage waveform. The series and parallel combinations of switches in the proposed topology reduce the total number of conducting switches in each level of output voltages. In addition, a comparison between the proposed topology with another topology from the literature is presented. To verify the proposed topology, the computer based simulation model is developed using MATLAB/Simulink and experimentally with a prototype model results are then compared.

Hybrid Multilevel Inverter Connecting a Full-bridge Inverter to a 5-level Inverter in Series (풀-브리지 인버터와 5-레벨 인버터의 직렬결합을 이용한 혼합형 멀티레벨 인버터)

  • Hong, Un-Taek;Choi, Won-Kyun;Kwon, Cheol-Soon;Kang, Feel-Soon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.16 no.1
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    • pp.30-37
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    • 2011
  • This paper presents a circuit configuration of multilevel inverter to synthesize a large number of output voltage levels by connecting a full-bridge inverter to a 5-level inverter in series. We analyze the characteristics by computer-aided simulations and experiments when it has input voltage sources which have the same and the power of three in the amplitude. In addition, it is compared with the conventional transformer based multilevel inverter.

Output Filler Design for Noise Reduction of Induction Motor Drive System using H-Bridge 7-Level Inverters (H-Bridge 7레벨 인버터를 이용한 유도전동기 구동시스템의 노이즈 저감을 위한 출력 필터설계)

  • Kim, Soo-Hong;Ahn, Young-Oh;Kim, Yoon-Ho;Bang, Sang-Seok;Kim, Kwang-Seob
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.20 no.3
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    • pp.36-44
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    • 2006
  • In general, the generated harmonics and noise of the PWM inverter are affected by PWM switching method, switching frequency, dv/dt and di/dt. Since multilevel inverters are often applied to the high power system, and operates with low switching frequency, theyproduce large size of harmonic contents and noise. Thus it is necessary to install output filters in the multilevel inverter. In this paper a filter design approach for the harmonic and noise reduction the three phase induction motor driving system using H-bridge 7-level inverter system is presented. The passive filter that has low cost and simple structure and can effectively reduce harmonics and noise, is designed and applied to the three phase induction motor drive having multilevel inverter system. The designed system is implemented and verified by simulation and experiments.

Efficient Switching Pattern to Decrease Switching Losses in Cascaded H-bridge PWM Multilevel Inverter (Cascaded H-bridge PWM 멀티레벨인버터의 스위칭 손실 저감을 위한 효율적인 스위칭 패턴)

  • Jeong, Bo Chang;Kim, Sun-Pil;Kim, Kwang Soo;Park, Sung-Jun;Kang, Feel-Soon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.4
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    • pp.502-509
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    • 2013
  • It presents an efficient switching pattern, which expects a reduction of switching losses in a cascaded H-bridge PWM multilevel inverter. By the proposed switching scheme, the lower H-bridge module operates at low frequency of 60[Hz] because it assigns to transfer most load power. The upper H-bridge module operates at high frequency of PWM switching to improve THD of output voltage. The proposed switching pattern applies to cascaded H-bridge multilevel inverter with PD, APOD, bipolar, and unipolar switching methods. By computer-aided simulations, we verify the validity of the proposed switching scheme. Finally, we prove that the proposed PD and APOD switching patterns are better than those of the conventional one in efficiency.

Design and Implementation of a New Multilevel DC-Link Three-phase Inverter

  • Masaoud, Ammar;Ping, Hew Wooi;Mekhilef, Saad;Taallah, Ayoub;Belkamel, Hamza
    • Journal of Power Electronics
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    • v.14 no.2
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    • pp.292-301
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    • 2014
  • This paper presents a new configuration for a three-phase multilevel voltage source inverter. The main bridge is built from a classical three-phase two-level inverter and three bidirectional switches. A variable DC-link employing two unequal DC voltage supplies and four switches is connected to the main circuit in such a way that the proposed inverter produces four levels in the output voltage waveform. In order to obtain the desired switching gate signals, the fundamental frequency staircase modulation technique is successfully implemented. Furthermore, the proposed structure is extended and compared with other types of multilevel inverter topologies. The comparison shows that the proposed inverter requires a smaller number of power components. For a given number of voltage steps N, the proposed inverter requires N/2 DC voltage supplies and N+12 switches connected with N+7 gate driver circuits, while diode clamped or flying capacitor inverters require N-1 DC voltage supplies and 6(N-1) switches connected with 6(N-1) gate driver circuits. A prototype of the introduced configuration has been manufactured and the obtained simulation and experimental results ensure the feasibility of the proposed topology and the validity of the implemented modulation technique.