• Journal of Power Electronics
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• 제18권4호
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• pp.1027-1036
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• 2018

In this paper a new generalized space vector pulse width modulation scheme is proposed based on the principle of reverse mapping to drive the switches of multilevel inverters. This projected scheme is developed based on the middle vector of the subhexagon which holds the tip of the reference vector, which plays a major role in mapping the reference vector. A new approach is offered to produce middle vector of the subhexagon which holds tip of the reference vector in the multilevel space vector plane. By using middle vector of the subhexagon, reference vector is linked towards the inner two level sub-hexagon. Then switching vectors, switching sequence and dwell times corresponding to a particular sector of a two-level inverter are determined. After that, by using the two level stage findings, the switching vectors related to exact position of the reference vector are directly generated based on principle of the reverse mapping approach and do not need to be found at n level stage. In the reverse mapping principle, the middle vector of subhexagon is added to the formerly found two level switching vectors. The proposed generalized algorithm is efficient and it can be applied to an inverter of any level. In this paper, the proposed scheme is explained for a five-level inverter and the performance is analyzed for five level and three level inverters through MATLAB. The simulation results are validated by implementing the propose scheme on a V/f controlled three-level inverter fed induction motor using dSPACE control desk.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2011년도 춘계학술대회 논문집
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• pp.1473-1479
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• 2011

In this paper, speed control of IPMSM drives for the next generation domestic high speed railway system using multilevel inverter is presented. Multilevel inverter is suitable for the high-voltage high-capacity motor drive system because noise and switching frequency of power semiconductor devices is reduced. For the speed control of IPMSM using multilevel inverter, maximum torque control is applied in a constant torque region, and field weakening control is applied in a constant power region. Simulation programs based on Matlab/Simulink are developed. Finally the designed system is verified by simulation and their characteristics are analyzed by the simulation results.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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• pp.1-4
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• 2003

This paper proposes a method of voltage control for three-phase multilevel H-bridge inverters with selective harmonic elimination (SHE) PWM The full-bridge configuration of H-bridge inverter cells enables voltage control with a fixed PWM pattern by means of phase shifting between the legs, which greatly simplifies the control while maintaining the harmonic elimination characteristics. The series combination of the cells in multilevel configuration can be exploited to further improve the hormonic elimination characteristics with proper phase shifting between the ceil volitage. A complexor-based control method is introduced to control the magnitude and phase angle of cell voltages that form three-phase multilevel output voltages. Simulation results show that the proposed method along with SHE PWM would provide satisfactory performance in spite of its simplicity.

• Journal of Power Electronics
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• 제13권5호
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• pp.787-797
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• 2013

Despite the advantages offered by multilevel inverters, one of the main drawbacks that prevents their widespread use is their circuit complexity as the number of power switches employed is usually high. This paper presents a new multilevel inverter topology with a considerable reduction in the number of power switches used through the switch-sharing approach. The fact that the proposed inverter applies two bidirectional power switches for sharing among the three phases does not prevent it from producing seven levels in the line-to-line output voltage waveforms. A modified scheme of space vector modulation via the application of virtual voltage vectors is developed to generate the PWM signals of the power switches. The performance of the proposed inverter is investigated through MATLAB/SIMULINK simulations and is practically tested using a laboratory prototype with a DSP-based modulator. The results demonstrate the satisfactory performance of the inverter and verify the effectiveness of the modulation method.

• Journal of Electrical Engineering and Technology
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• 제13권1호
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• pp.270-279
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• 2018

This paper elucidates a hysteresis current controller for enhancing the performance of static synchronous compensator (STATCOM) using cascaded H-bridge multilevel inverter. Due to the rising power demand and growing conventional generation costs a new alternative in renewable energy source is gaining popularity and recognition. A five level single phase cascaded multilevel inverter with two separated dc sources, which is energized by photovoltaic - wind hybrid energy source. The voltages across the each dc source is balanced and standardized by the proposed hysteresis current controller. The performance of STATCOM is analyzed by connecting with grid connected system, under the steady state & dynamic state. To reduce the Total Harmonic Distortion (THD) and to improve the output voltage, closed loop hysteresis current control is achieved using PLL and PI controller. The performance of the proposed system is scrutinized through various simulation results using matlab/simulink and hardware results are also verified with simulation results.

• Journal of Power Electronics
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• 제15권1호
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• pp.96-105
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• 2015

In recent years, the multilevel converters have been given more attention due to their modularity, reliability, failure management and multi stepped output waveform with less total harmonic distortion. This paper presents a novel symmetric multilevel inverter topology with reduced switching components to generate a high quality stepped sinusoidal voltage waveform. The series and parallel combinations of switches in the proposed topology reduce the total number of conducting switches in each level of output voltages. In addition, a comparison between the proposed topology with another topology from the literature is presented. To verify the proposed topology, the computer based simulation model is developed using MATLAB/Simulink and experimentally with a prototype model results are then compared.

• 전력전자학회논문지
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• 제16권1호
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• pp.30-37
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• 2011

본 논문에서는 풀-브리지 인버터와 양방향 스위치를 가지는 5-레벨 인버터를 직렬 결합시켜 출력전압에 다수의 레벨을 형성할 수 있는 멀티레벨 인버터 구조를 제안한다. 제안된 회로의 입력전압원 크기가 서로 동일한 경우와 3의 배수 형태를 가지는 경우에 대한 특성을 분석하고 시뮬레이션 및 실험을 통해 효율적인 혼합형 회로 구성을 제시한다. 또한 기존의 변압기를 이용한 방식과 비교하여 장단점을 분석한다.

• 조명전기설비학회논문지
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• 제20권3호
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• pp.36-44
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• 2006

일반적으로 PWM인버터에 발생된 고조파와 노이즈는 스위칭 주파수, dv/dt와 di/dt, PWM 스위칭 방법에 의해 영향을 받는다. 멀티레벨 인버터가 고전력 시스템에 적용되어 낮은 주파수에서 동작할 때 이것은 큰 고조파 성분과 노이즈를 발생하게 된다. 따라서 멀티레벨 인버터에 출력 필터가 요구된다. 본 논문에서는 H-bridge 7레벨 인버터 시스템을 사용한 3상 유도 전동기 구동 시스템의 고조파와 노이즈 감소를 위해 출력 필터를 설계하였다. 가격이 저렴하고 간단한 구조를 가지며, 고조파와 노이즈를 효과적으로 감소시킬 수 있는 수동필터는 멀티레벨 인버터 시스템을 사용한 3상 유도전동기 구동시스템에 적용되었다. 설계된 시스템은 향상되었고, 시뮬레이션과 실험을 통해 그 타당성을 증명하였다.

• 전기학회논문지
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• 제62권4호
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• pp.502-509
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• 2013

It presents an efficient switching pattern, which expects a reduction of switching losses in a cascaded H-bridge PWM multilevel inverter. By the proposed switching scheme, the lower H-bridge module operates at low frequency of 60[Hz] because it assigns to transfer most load power. The upper H-bridge module operates at high frequency of PWM switching to improve THD of output voltage. The proposed switching pattern applies to cascaded H-bridge multilevel inverter with PD, APOD, bipolar, and unipolar switching methods. By computer-aided simulations, we verify the validity of the proposed switching scheme. Finally, we prove that the proposed PD and APOD switching patterns are better than those of the conventional one in efficiency.

• Journal of Power Electronics
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• 제14권2호
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• pp.292-301
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• 2014

This paper presents a new configuration for a three-phase multilevel voltage source inverter. The main bridge is built from a classical three-phase two-level inverter and three bidirectional switches. A variable DC-link employing two unequal DC voltage supplies and four switches is connected to the main circuit in such a way that the proposed inverter produces four levels in the output voltage waveform. In order to obtain the desired switching gate signals, the fundamental frequency staircase modulation technique is successfully implemented. Furthermore, the proposed structure is extended and compared with other types of multilevel inverter topologies. The comparison shows that the proposed inverter requires a smaller number of power components. For a given number of voltage steps N, the proposed inverter requires N/2 DC voltage supplies and N+12 switches connected with N+7 gate driver circuits, while diode clamped or flying capacitor inverters require N-1 DC voltage supplies and 6(N-1) switches connected with 6(N-1) gate driver circuits. A prototype of the introduced configuration has been manufactured and the obtained simulation and experimental results ensure the feasibility of the proposed topology and the validity of the implemented modulation technique.