• 제목/요약/키워드: Multilevel inverters

검색결과 109건 처리시간 0.027초

배전선로 적용을 위한 새로운 무효전력보상치(ASVC)의 설계 (Design of Advanced Static Var Compensator(ASVC) for Distribution Line)

  • 민완기;이상훈;최재호
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1997년도 하계학술대회 논문집 F
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    • pp.2010-2012
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    • 1997
  • A cascade multilevel voltage source inverter is introduced to apply the advanced static var compensator(ASVC) for large scale power application. This cascade M-level inverter consists of (M-1)/2 single-phase full bridges. This inverter is suitable to the flexible ac transmission systems(FACTS) including SVC, series compensation and phase shifting. It can solve the problems of conventional transformer -based multipulse inverters and multilevel diode-clamped inverters. From the simulation results, the validity of ASVC with cascade multilevel inverter is shown for high power application.

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Novel Single-State PWM Technique for Common-Mode Voltage Elimination in Multilevel Inverters

  • Nguyen, Nho-Van;Quach, Hai-Thanh;Lee, Hong-Hee
    • Journal of Power Electronics
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    • 제12권4호
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    • pp.548-558
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    • 2012
  • In this paper, a novel offset-based single-state pulse width modulation (PWM) method for achieving zero common-mode voltage (CMV) and reducing switching losses in multilevel inverters is presented. The specific active switching state of the zero common-mode (ZCM) voltage that approximates the reference voltage can be deduced from the switching state sequence of the reduced CMV phase disposition PWM (CMV PD PWM) method. From the reference leg voltages for the zero common-mode voltage, an N-to-2-level transformation defines a virtual two-level inverter and the corresponding nominal leg voltage references. The commutation process of the reduced CMV PD PWM method in a multilevel inverter and its outputs can be simply followed in a nominal switching time diagram for the virtual inverter. The characteristics of the reduced CMV PD PWM and the single-state PWM for zero common-mode voltage are analyzed in detail in this paper. The theoretical analysis of the proposed PWM method is verified by experimental results.

A Single Carrier Multi-Modulation Method In Multilevel Inverters

  • Nho Nguyen Van;Youn Myung Joong
    • Journal of Power Electronics
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    • 제5권1호
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    • pp.76-82
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    • 2005
  • A novel variant of full multi-modulation applications to diode-clamped and cascade multilevel inverter-termed single carrier multi-modulation is presented. The proposed PWM-technique is advantageous for its simple implementation. The correlation between multi-carrier and single-carrier multi-modulations is deduced. For the PWM methods, a mathematical model of voltage source inverter and general algorithm for the multi-modulating modulator are proposed. The theory is demonstrated by simulation results

An Improved Carrier-based SVPWM Method By the Redistribution of Carrier-wave Using Leg Voltage Redundancies in Generalized Cascaded Multilevel Inverter

  • Kang, Dae-Wook;Lee, Yo-Han;Suh, Bum-Seok;Park, Chang-Ho;Hyun, Dong-Seok
    • Journal of Power Electronics
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    • 제1권1호
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    • pp.36-47
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    • 2001
  • The carrier-based space vector pulse width modulation(SVPWM), which is considered as highly simple and efficient PWM technology, can be also used in multilevel inverters. The method was originally designed for the two-level inverter and developed to the diode clamped multilevel inverter structure. however it may be noted that it also cause bad switch utilization in cascaded multilevel inverter. This paper introduces an improved carrier-based SVPWM scheme, which is fully suitable for cascaded multilevel inverter topologies because it can achieve the optimized switch utilization through the redistribution of the triangular carrier waves considering leg voltage redundancies while having the advantages of the conventional carrier-based SVPWM. Using simulation and experimental results, the superior performance of new PWM method is shown.

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Verification of New Family for Cascade Multilevel Inverters with Reduction of Components

  • Banaei, M.R.;Salary, E.
    • Journal of Electrical Engineering and Technology
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    • 제6권2호
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    • pp.245-254
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    • 2011
  • This paper presents a new group for multilevel converter that operates as symmetric and asymmetric state. The proposed multilevel converter generates DC voltage levels similar to other topologies with less number of semiconductor switches. It results in the reduction of the number of switches, losses, installation area, and converter cost. To verify the voltage injection capabilities of the proposed inverter, the proposed topology is used in dynamic voltage restorer (DVR) to restore load voltage. The operation and performance of the proposed multilevel converters are verified by simulation using SIMULINK/MATLAB and experimental results.

Cascaded H-bridge Multilevel Inverter employing Front-end Flyback Converter with Single Independent DC Voltage Source

  • Kim, Ki-Du;Bae, Gyou-Tak;Kang, Feel-Soon
    • Journal of international Conference on Electrical Machines and Systems
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    • 제2권2호
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    • pp.197-201
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    • 2013
  • Cascaded H-bridge multilevel inverter requires independent DC voltage sources to produce multi output voltage levels. When it needs to generate more levels in the output voltage wave, the number of independent DC voltage sources usually limits its extension. To solve this problem, we propose a cascaded H-bridge multilevel inverter employing a front-end flyback converter for unifying input DC voltage sources. After theoretical analysis of the proposed circuit, we verify the validity of the proposed inverter using computer-aided simulations and experiments.

Space vector modulation을 이용한 대용량 멀티 레벨 H-bridge 인버터의 해석 및 모델링 (Analysis and modelling of the large capacity multilevel H-bridge inverter using Space vector modulation)

  • 김효진;정승기
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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    • pp.5-9
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    • 2003
  • Conventional variable-speed Induction motor drives with inverters are subject to detrimental effect of zero-sequence voltages, such a shaft voltage and bearing current. This paper presents a way of the suppression of the zero-sequence components in multilevel H-bridge inverters. First examined Is the inherent zero-sequence characteristic of the conventional subharmonic PW method. Then it is shown that the zero-sequence voltage can be eliminated with proper -selection of switching states with space vector modulation. Although this method alone restricts the linear modulation range of control, a combination of the proposed method and the minimum switching method appears to be effective in suppressing the zero-sequence voltage to minimum level while maintaining the linear control range.

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PWM Control Techniques for Single-Phase Multilevel Inverter Based Controlled DC Cells

  • Sayed, Mahmoud A.;Ahmed, Mahrous;Elsheikh, Maha G.;Orabi, Mohamed
    • Journal of Power Electronics
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    • 제16권2호
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    • pp.498-511
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    • 2016
  • This paper presents a single-phase five-level inverter controlled by two novel pulse width modulation (PWM) switching techniques. The proposed PWM techniques are designed based on minimum switching power loss and minimum total harmonic distortion (THD). In a single-phase five-level inverter employing six switches, the first proposed PWM technique requires four switches to operate at switching frequency and two other switches to operate at line frequency. The second proposed PWM technique requires only two switches to operate at switching frequency and the rest of the switches to operate at line frequency. Compared with conventional PWM techniques for single-phase five-level inverters, the proposed PWM techniques offer high efficiency and low harmonic components in the output voltage. The validity of the proposed PWM switching techniques in controlling single-phase five-level inverters to regulate load voltage is verified experimentally using a 100 V, 500 W laboratory prototype controlled by dspace 1103.

NPC 3-레벨 인버터를 적용한 차세대 고속전철 IPMSM의 구동 (IPMSM Drives Using NPC 3-Level Inverters for the Next Generation High Speed Railway System)

  • 권순환;진강환;김성제;이태형;김윤호
    • 한국철도학회논문집
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    • 제15권2호
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    • pp.129-134
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    • 2012
  • NPC 멀티레벨 인버터는 2-레벨 인버터 방식에 비해 전력용 반도체 소자의 정격 전압과 출력전류의 고조파를 감소시킬 수 있는 장점이 있어 고압 대용량 전동기 구동시스템에 적합하다. NPC 3-레벨 인버터를 이용한 IPMSM의 속도 제어에서 일정 토크 영역에서는 최대 토크 제어, 일정 출력 영역에서는 약계자 제어 방식을 적용하였다. 제안된 시스템은 MATLAB/Simulink를 이용한 시뮬레이터를 구현하여 모의 시험 결과 분석을 통해 그 타당성을 검증하였다.

Analysis of Cascaded H-Bridge Multilevel Inverter in DTC-SVM Induction Motor Drive for FCEV

  • Gholinezhad, Javad;Noroozian, Reza
    • Journal of Electrical Engineering and Technology
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    • 제8권2호
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    • pp.304-315
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    • 2013
  • In this paper, analysis of cascaded H-bridge multilevel inverter in DTC-SVM (Direct Torque Control-Space Vector Modulation) based induction motor drive for FCEV (Fuel Cell Electric Vehicle) is presented. Cascaded H-bridge multilevel inverter uses multiple series units of H-bridge power cells to achieve medium-voltage operation and low harmonic distortion. In FCEV, a fuel cell stack is used as the major source of electric power moreover the battery and/or ultra-capacitor is used to assist the fuel cell. These sources are suitable for utilizing in cascaded H-bridge multilevel inverter. The drive control strategy is based on DTC-SVM technique. In this scheme, first, stator voltage vector is calculated and then realized by SVM method. Contribution of multilevel inverter to the DTC-SVM scheme is led to achieve high performance motor drive. Simulations are carried out in Matlab-Simulink. Five-level and nine-level inverters are applied in 3hp FCEV induction motor drive for analysis the multilevel inverter. Each H-bridge is implemented using one fuel cell and battery. Good dynamic control and low ripple in the torque and the flux as well as distortion decrease in voltage and current profiles, demonstrate the great performance of multilevel inverter in DTC-SVM induction motor drive for vehicle application.