• Journal of the Korean Ceramic Society
• /
• v.41 no.6
• /
• pp.450-455
• /
• 2004

NiCr thin films were fabricated by thermal evaporation method using NiCr alloy as evaporating source. NiCr thin films were annealed at various temperatures in air atmosphere in order to investigate effects of annealing conditions on phase change, composition, and microstructures of NiCr films. Typical multilayer was formed after annealing in air atmosphere. This results from the diffusion and oxidation of Cr toward surface during annealing. In the case of annealing at 700$^{\circ}C$, large columnar grains of NiO were formed on Cr-oxide layer through the diffusion and oxidation of Ni over Cr-oxide layer. Especially, NiO layer was formed additionally on surface, sustaining the underlayer structure with the formation of porous Ni layer.

• Journal of the Microelectronics and Packaging Society
• /
• v.10 no.1
• /
• pp.19-24
• /
• 2003

A very small size 2.4 GHz ISM band BPF(Band Pass Filter) is realized using LTCC Multi-layer technology. Proposed design method enables to achieve BPF size $2.0\times1.2\times0.8mm^3$. A $lambda/4$ resonator with shunt-to-ground loaded capacitor is used to shorten resonator length, achieving higher quality factor. Also this resonator enables BPF to improve out-of-band rejection. Coupling coefficients between coupled strip-line resonators and external quality factor (Qe) of a resonator are derived and applied to the filter design. The measured results show good agreement with simulated data.

• Journal of the Microelectronics and Packaging Society
• /
• v.16 no.1
• /
• pp.39-43
• /
• 2009

In order to develop piezoelectric inverter module for CCFL driving, Rosen-type multilayer piezoelectric transformer was fabricated. The output power and efficiency of mutilayer piezoelectric transformer according to the variation inner electrode layer were investigated. Mutilayer piezoelectric transformer was fabricated conventional mutilayer ceramic method using PZT base ceramics. Also, piezoelectric inverter module was adopted driving circuit with half-bridge type. The piezoelectric inverter module was set up with input voltage 12.5 V, switching frequency 104.3 KHz. The results showed the value of step-up ratio 100, efficiency 87% at load resistance of $100k{\Omega}$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2003.05c
• /
• pp.219-222
• /
• 2003

$0.2(PbMg_{1/3}Nb_{2/3}O_3)-0.8(PbZr_{0.475}Ti_{0.525}O_3)$ 조성을 이용하여 $5{\times}5{\times}5mm^3$의 적층형 세라믹 액츄에이터 소자를 tape casting 방법으로 제작하였다. 전극재로서는 Ag-Pd를 이용하여 총 50층의 layer를 적층하였으며, 적층된 액츄에이터를 $1100^{\circ}C$의 온도에서 소결하였다. X-ray diffractometer를 이용하여 제작된 소자와 열화된 소자의 구조적인 특성을 분석하였다. 제작된 소자의 열화 특성을 알아보기 위하여 60 Hz 의 triangular wave를 인가하여 열화전과 후의 p-E hystcresis loop의 변화를 살펴보았으며, 인가된 전압의 변화에 따라서 소자에서 발생되는 양의 열을 측정하였다. 파괴된 소자의 파단면에 대한 SEM 분석을 통하여 소자의 파괴 메카니즘을 알아보도록 하였다. 이로부터 전기적 기계적 열화가 소자의 동작에 미치는 영향에 대해서 알아 보았다.

• Journal of the Korean Ceramic Society
• /
• v.35 no.10
• /
• pp.1040-1048
• /
• 1998

Ferroelectric properties of{{{{ { { { {SrBi }_{2 }Ta }_{2-x }Nb }_{x }O }_{9 } }} (SBIN) thin films were affected by the amount of Bi content in SBTN. The addition of Bi into the SBTN films could be accomplished by heat treating SBTN/Bi2O3/SBTN het-erostructures fabricated by r.f. magnetron sputtering method. The variation of Bi content was controlled by changing the thickness of the sandwiched Bi2O3 in SBTN/Bi2O3/SBTN heterostructure from 50 to 400$\AA$. As changing the thickness of the sandwiched Bi2O3 in Bi2O3 films was increased from 0 to 100$\AA$ the grain grew faster and the ferroelectric pro-perties were improved. On the other hand when the thickness of Bi2O3 films was thicker than 150$\AA$ the fer-roelectric properties were deteriorated Especially for SBTN thin films inserted by 400$\AA$ Bi2O3 layer a Bi2Phase appeared as a second phase resulting in poor ferroelectric properties. The maximum remanent po-larization (2Pr) and coercive field(Ec) were obtained for the SBTN/Bi2O3/(100$\AA$)/SBTN thin films. In this case 2Pr and Ec were 14.75 $\mu$C/cm2 and 53.4kV/cm at an applied voltage of 3V respectively.

• Journal of Advanced Navigation Technology
• /
• v.23 no.2
• /
• pp.172-178
• /
• 2019

This paper has designed, fabricated, and analyzed the passive devices realized using low temperature co-fired ceramic (LTCC) multi layer substrates by dividing into the shrinkage process and the non-shrinkage process. Using two types of ceramic materials with dielectric constant 7 or 40, we have fabricated the same shape of various elements in 2 different processes and compared the characteristics. For the substrate of dielctric constant 40, compared with the shrinkage process which has 17% shrink in the X and Y directions with 36% shrink in the Z direction, the non-shrinkage process has 43% shrink in the Z direction without shrink in the X and Y directions, so high dimensional accuracy and surface flatness can be obtained. The inductances and capacitances of the fabricated elements are estimated from measurement using empirical analysis equations of parameters and implemented as a design library. Depending on the substrate and the process, the inductance and capacitance depending on the turn number of winding and unit area have been measured, and empirical polynomials are proposed to predict element values.

• Journal of the Korean Ceramic Society
• /
• v.49 no.5
• /
• pp.475-483
• /
• 2012

High capacitance X5R MLCCs based on $BaTiO_3$ ceramic dielectric layers exhibit a single broad, asymmetric arc shape impedance and modulus response over the wide frequency range between 1 MHz to 0.01 Hz. Analysis according to the conventional brick-layer model for polycrystalline conductors employing a series connection of multiple RC parallel circuits leads to parameters associated with large errors and of little physical significance. A new parametric impedance model is shown to satisfactorily describe the experimental spectra, which is a parallel network of one resistor R representing the DC conductivity thermally activated by 1.32 eV, one ideal capacitor C exactly representing bulk capacitance, and a constant phase element (CPE) Q with complex capacitance $A(i{\omega})^{{\alpha}-1}$ with ${\alpha}$ close to 2/3 and A thermally activated by 0.45 eV or ca. 1/3 of activation energy of DC conductivity. The feature strongly indicate the CK1 model by J. R. Macdonald, where the CPE with 2/3 power-law exponent represents the polarization effects originating from mobile charge carriers. The CPE term is suggested to be directly related to the trapping of the electronic charge carriers and indirectly related to the ionic defects responsible for the insulation resistance degradation.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.14 no.10
• /
• pp.1036-1043
• /
• 2003

In this paper, novel lumped equivalent circuits for a conventional parallel directional coupler are proposed. This novel equivalent circuits only have self inductance and self capacitance, so we can design exact lumped equivalent circuit. The equivalent circuit and design formula for the presented lumped element coupler is derived based on the even- and odd-mode properties of a parallel-coupled line. By using the derived design formula, we have designed the 3 dB and 10 dB lumped element directional couplers at the center frequency of 100 MHz and 2 GHz, respectively a chip type directional coupler has been designed with multilayer configurations by employing commercial EM simulator. Designed chip-type directional couplers have a 3 dB-coupling value at the center frequency of 2 GHz and fabricated lumped directional coupler on fr4 organic substrate has a 3 dB, 10 dB-coupling values at the center frequency of 100 MHz. Excellent agreements between simulation results and measurement results on the designed directional couplers show the validity of this paper. Furthermore, in order to adapt to multi-layer process such as Low Temperature Cofired Ceramic (LTCC), chip-type lumped element couplers have been designed by using this method.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2002.11a
• /
• pp.317-321
• /
• 2002

Piezoelectric properties of $(Pb_{1-x}Y_x)[(Ni_{1/3}Nb_{2/3})_{0.15}(Zr_{1/2}Ti_{1/2)})_{0.85}]O_{3}$ (x=0~0.05) ceramics were investigated, The stoichiometric PNN-PZT ceramics required the sintering temperature above $1100^{\circ}C$, but the addition of $Y_{2}O_{3}$ in the PNN-PZT ceramic lowered the sintering temperature down to $1000^{\circ}C$. In case of x=0.005, the electro-mechanical coupling $factor(K_p)$, the piezoelectric $constant(d_{33})$, and the maximum strain ratio of PNN-PZT ceramics sintered at $1000^{\circ}C$ were 53.1%, 395pC/N, and $2200{\times}10^{-6}$ respectively, A 30-layer piezoelectric actuator$(10{\times}10{\times}1.7mm)$ fabricated with the above material showed the maximum strain of $2.09{\mu}m$ under 100V DC bias.