• 제목/요약/키워드: Multi-layer ceramic capacitors

검색결과 17건 처리시간 0.027초

우리나라 고용량 MLCC 기술 개발의 역사와 전망 (Development History and Trend of High-Capacitance Multi-layer Ceramic Capacitor in Korea)

  • 홍정오;김상혁;허강헌
    • 한국세라믹학회지
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    • 제46권2호
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    • pp.161-169
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    • 2009
  • MLCC (Multi-layer Ceramic Capacitor) is the most important passive component in electronic devices such as HHP, PC and digital display. The development trend of MLCC is a miniaturization with increasing the capacitance. In this paper, a development history of the high capacitance MLCC in Korea was introduced, and the necessity of the finer $BaTiO_3$ was explained in the viewpoint of the issued electrical and dielectric properties of high capacitance MLCC. The bottleneck technologies to realize the high capacitance was shortly introduced, followed by the prediction of the development trend of MLCC in near future.

BST Thin Film Multi-Layer Capacitors

  • Choi, Woo Sung;Kang, Min-Gyu;Ju, Byeong-Kwon;Yoon, Seok-Jin;Kang, Chong-Yun
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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    • pp.319-319
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    • 2013
  • Even though the fabrication methods of metal oxide based thin film capacitor have been well established such as RF sputtering, Sol-gel, metal organic chemical vapor deposition (MOCVD), ion beam assisted deposition (IBAD) and pulsed laser deposition (PLD), an applicable capacitor of printed circuit board (PCB) has not realized yet by these methods. Barium Strontium Titanate (BST) and other high-k ceramic oxides are important materials used in integrated passive devices, multi-chip modules (MCM), high-density interconnect, and chip-scale packaging. Thin film multi-layer technology is strongly demanded for having high capacitance (120 nF/$mm^2$). In this study, we suggest novel multi-layer thin film capacitor design and fabrication technology utilized by plasma assisted deposition and photolithography processes. Ba0.6Sr0.4TiO3 (BST) was used for the dielectric material since it has high dielectric constant and low dielectric loss. 5-layered BST and Pt thin films with multi-layer sandwich structures were formed on Pt/Ti/$SiO_2$/Si substrate by RF-magnetron sputtering and DC-sputtering. Pt electrodes and BST layers were patterned to reveal internal electrodes by photolithography. SiO2 passivation layer was deposited by plasma-enhanced chemical vapor deposition (PE-CVD). The passivation layer plays an important role to prevent short connection between the electrodes. It was patterned to create holes for the connection between internal electrodes and external electrodes by reactive-ion etching (RIE). External contact pads were formed by Pt electrodes. The microstructure and dielectric characteristics of the capacitors were investigated by scanning electron microscopy (SEM) and impedance analyzer, respectively. In conclusion, the 0402 sized thin film multi-layer capacitors have been demonstrated, which have capacitance of 10 nF. They are expected to be used for decoupling purpose and have been fabricated with high yield.

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Effect of Passivation on the Sintering Behavior of Submicron Nickel Powder Compacts for MLCC Application

  • Jo, Gi-Young;Lee, Kwi-Jong;Kang, Suk-Joong L.
    • 한국분말재료학회지
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    • 제20권6호
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    • pp.405-410
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    • 2013
  • During sintering of Ni-electrode multi-layer ceramic capacitors (MLCCs), the Ni electrode often becomes discontinuous because of its lower sintering temperature relative to that of $BaTiO_3$. In an attempt to retard the sintering of Ni, we introduced passivation of the Ni powder. To find the optimal passivation conditions, a thermogravimetric analysis (TGA) was conducted in air. After passivation at $250^{\circ}C$ for 11 h in air, a nickel oxide shell with a thickness of 4-5 nm was formed on nickel nanoparticles of 180 nm size. As anticipated, densification of the compacts of the passivated Ni/NiO core-shell powder was retarded: the starting temperature of densification increased from ${\sim}400^{\circ}C$ to ${\sim}600^{\circ}C$ in a $97N_2-3H_2$ (vol %) atmosphere. Grain growth was also retarded during sintering at temperatures of 750 and $1000^{\circ}C$. When the sintering atmosphere was changed from wet $99.93N_2-0.07H_2$ to wet $99.98N_2-0.02H_2$, the average grain size decreased at the same sintering temperature. The conductivity of the passivated powder sample sintered at $1150^{\circ}C$ for 8 h in wet $99.93N_2-0.07H_2$ was measured to be $3.9{\times}10^4S/cm$, which is comparable with that, $4.6{\times}10^4S/cm$, of the Ni powder compact without passivation. These results demonstrate that passivation of Ni is a viable means of retarding sintering of a Ni electrode and hence improving its continuity in the fabrication of $BaTiO_3$-based multi-layer ceramic capacitors.

Design and Implementation of Broadband Antenna and Diplexer for Dual- Band Handsets

  • Joung, Myoung-Sub;Park, Jun-Seok;Kim, Hyeong-Seok;Lim, Jae-Bong;Cho, Hong-Goo
    • KIEE International Transactions on Electrophysics and Applications
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    • 제4C권6호
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    • pp.288-294
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    • 2004
  • In this paper, a ceramic antenna and diplexer are designed for dual-band handset ap plications. Basically, the antenna is designed by using the meander line configuration. The diplexer presented in this paper is composed of both low- and high-pass filters. We have designed the low- and high-pass filters with attenuation poles to improve the attenuation performances of the diplexer. The attenuation poles are located at each rejection frequency region so as to improve the shrinkage characteristic of the diplexer. In order to accomplish the volume effectiveness, the antenna and the diplexer have been designed and fabricated in a multi-layer structure. The diplexer designed with a multi-layer structure has inductors and capacitors, which are implemented by LTCC (Low Temperature Co-fired Ceramics) process technique. Design of the multi-layer antenna and diplexer has been achieved by employing the full 3-D EM simulation. The designed antenna and diplexer offer excellent return loss and broadband performances with highly isolated rejection performance.

Circuit Modeling of 3-D Parallel-plate Capacitors Fabricated by LTCC Process

  • Shin, Dong-Wook;Oh, Chang-Hoon;Yun, Il-Gu;Lee, Kyu-Bok;Kim, Jong-Kyu
    • Transactions on Electrical and Electronic Materials
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    • 제5권1호
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    • pp.19-23
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    • 2004
  • A novel method of high speed, accurate circuit simulation in 3-dimensional (3-D) parallel-plate capacitors is investigated. The basic concept of the circuit simulation methods is partial element equivalent circuit model. The three test structures of 3-D parallel-plate capacitors are fabricated by using multi-layer low-temperature co-fired ceramic (LTCC) process and their S-parameters are measured between 50 MHz and 5 GHz. S-parameters are converted to Y-parameters, for comparing measured data with simulated data. The circuit model parameters of the each building block are optimized and extracted using HSPICE circuit simulator. This method is convenient and accurate so that circuit design applications can be easily manipulated.

CAD를 이용한 LTCC-MLC 대역 통과 필터 설계 (Computer-Aided Design of LTCC-MLC Band Pass Filter)

  • 강종윤;최지원;심성훈;윤석진;김현재
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
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    • pp.676-679
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    • 2001
  • A low-temperature cofired-ceramic (LTCC) multi-layer ceramic (MLC) band-pass filter (BPF) is presented, which has the benefits of low cost and small size. The BPF is designed for a IMT-2000 handset. The computer-aided design technology is also presented. The BPF with an attenuation pole at below the passband has been discussed and realized. The equivalent circuit of the BPF was established by transmission lines and lumped capacitors. The frequency characteristics of the LTCC-MLC BPF is well acceptable for IMT-2000 application.

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감쇠극을 갖는 적층형 세라믹 칩 필터의 설계 (Design of Multilayer Ceramic Chip Band pas Filter with an attenuation pole)

  • 강종윤;심성훈;최지원;박용욱;윤석진;김현재
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집
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    • pp.123-126
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    • 2002
  • A proposed multi-layer ceramic (MLC) chip type band-pass filter (BPF) is presented. The MLC chip BPF has the benefits of low cost and small size. The BPF consists of coulped stripline resonators and coupling capacitors. The BPF is designed to have an attenuation pole at below the passband for a receiver band of IMT-2000 handset. The computer-aided design technology is applied for analysis of the BPF frequency characteristics. The passband and attenuation pole depend the coupling between resonators and coupling capacitance. The frequency characterics of the passband and attenuation pole are analysed with the variance of the coupling between resonators and coupling capacitance. An equivalent circuit and structure of MLC chip BPF are proposed. The frequency characteristics of the BPF is well acceptable for IMT-2000 application.

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감쇠극을 갖는 적층형 세라믹 칩 필터의 설계 (Design of Multilayer Ceramic Chip Band Pass Filter with an Attenuation Pole)

  • 강종윤;심성훈;최지원;박용욱;이동윤;윤석진;김현재
    • 한국전기전자재료학회논문지
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    • 제16권8호
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    • pp.740-743
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    • 2003
  • A multi-layer ceramic (MLC) chip type band-pass filter (BPF) is presented. The MLC chip BPF has the benefits of low cost and small size. The BPF consists of coulped stripline resonators and coupling capacitors. The BPF is designed to have an attenuation pole at below the passband for a receiver band of IMT-2000 handset. The computer-aided design technology is applied for analysis of the BPF frequency characteristics. The passband and attenuation pole depend on the coupling between resonators and coupling capacitance. The frequency characterics of the passband and attenuation pole are analyzed with the variation of the coupling between resonators and coupling capacitance. An equivanlent circuit and structure of MLC chip BPF are proposed. The frequency characteristics of the BPF is well acceptable for IMT-2000 application.

CAD에 의한 초소형 적층형 대역 통과 칩 필터 설계 (Computer-Aided Design of Miniaturized Multilayer Band Pass Chip Filter)

  • 강종윤;최지원;심성훈;박용욱;윤석진;김현재
    • 한국전기전자재료학회논문지
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    • 제15권1호
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    • pp.56-60
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    • 2002
  • A low-temperature cofired-ceramic (LTCC) multi-layer ceramic (MLC) band-pass filter (BPF) is presented, which has the benefits of low cost and small size. The BPF is designed for an IMT-2000 handset. The computer-aided design technology is also presented. The BPF with an attenuation pole at below the passband has been discussed and realized. The equivalent circuit of the BPF was established by transmission lines and lumped capacitors. The frequency characteristics of the LTCC-MLC BPF is well acceptable for IMT-2000 application.

GSM/CDMA 대역용 LTCC Diplexer 설계 연구 (Study on a LTCC Diplexer Design for GSM/CDMA Applications)

  • 김태완;이영철
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2008년도 추계종합학술대회 B
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    • pp.632-635
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    • 2008
  • 본 논문에서는 LTCC 다층회로 기술을 이용하여 GSM/CDMA 대역을 분리하는 Diplexer를 설계하였다. Diplexer의 집적도를 높이기 위해 3차원 적층형 인덕터와 커패시터를 이용하여 설계되었다. Diplexer는 유전율 7.2인 총 6층의 LTCC 기판에 설계되었고, 설계 되어진 다이플렉서의 크기는 CB-CPW pad를 포함하여 $3,450{\times}4,000{\times}600{\mu}m^3$이다. GSM 대역의 통과 필터는 -0.23dB 이하의 삽입 손실과 -10dB 이하의 반사 손실, CDMA 대역의 통과 필터는 -0.53dB 이하의 삽입 손실과 -10dB 이하의 반사 손실의 특성을 보였다.

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