• Title/Summary/Keyword: Multi-Layer Density Analysis

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Evaluation on the Performance of Power Generation and Vibration Characteristics of Energy Harvesting Block Structures for Urban & Housing Application (도시·주택 적용 에너지수확 블록구조의 진동 특성 및 발전성능 평가)

  • Noh, Myung-Hyun;Lee, Sang-Youl
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.8
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    • pp.3735-3740
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    • 2012
  • In this paper, the performance of power generation for the energy harvesting block with a combination of piezoelectric technology and electromagnetic technology among various energy harvesting technologies was investigated. The goal of this study is to evaluate on the applicability of our developed energy harvesting block into the field of urban & housing. First, we carried out a finite element vibration analysis and evaluated the performance of power generation for the multi-layer energy harvester at laboratory scale. Second, we described the features of our developed prototype module that includes amplification technologies to improve power density per module and evaluated the performance of power generation for the energy harvesting block in a variety of ways. Finally, we suggested the direction for the improvement of the energy harvesting block module.

A Study on the Interception using Fine Fragments and Particles to Hypersonic Vehicles (미세파편 및 입자를 활용한 극초음속 비행체 요격 연구)

  • Insoo Kim;Bongjoo Kang;Seongpyo Kim;Jongwon Yoon;Sunghoon Kim
    • Journal of the Korea Institute of Military Science and Technology
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    • v.27 no.2
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    • pp.285-293
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    • 2024
  • This paper describes the interception using fine fragments and particles to hypersonic vehicles which have a vulnerability in thermal and pressure during glide-phase flight. This interception concept is based on the fast relative velocity and the flight vulnerability of hypersonic vehicles. For the density calculation of fragmentation and particle in interception, error analysis of end-phase was performed including radar, intercept missile and target maneuvering errors. In relation to the vulnerability and error analysis, the penetration characteristics of fine fragments in high temperature were analyzed. Presented the interception in glide-phase could be applied to the concept of horizontal multi-layer defense to hypersonic vehicles.

Ferroelectric, Leakage Current Properties of BiFeO3/Pb(Zr0.52Ti0.48)O3 Multilayer Thin Films Prepared by Chemical Solution Deposition (Chemical Solution Deposition 방법을 이용한 BiFeO3/Pb(Zr0.52Ti0.48)O3 다층박막의 전기적 특성에 대한 연구)

  • Cha, J.O.;Ahn, J.S.;Lee, K.B.
    • Journal of the Korean Vacuum Society
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    • v.19 no.1
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    • pp.52-57
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    • 2010
  • $BiFeO_3/Pb(Zr_{0.52}Ti_{0.48})O_3$(BFO/PZT) multilayer thin films have been prepared on a Pt/Ti/$SiO_2$/Si(100) substrate by chemical solution deposition. BFO single layer, BFO/PZT bilayer and multilayer thin films were studied for comparison. X-ray diffraction analysis showed that the crystal structure of all films was multi-orientated perovskite phase without amorphous and impurity phase. The leakage current density at 500 kV/cm was reduced by approximately four and five orders of magnitude by bilayer and multilayer structure films, compared with BFO single layer film. The low leakage current density leads to saturated P-E hysteresis loops of bilayer and multilayer films. In BFO/PZT multlayer film, saturated remanent polarization of $44.3{\mu}C/cm^2$ was obtained at room temperature at 1 kHz with the coercive field($2E_c$) of 681.4 kV/cm.

A Study on the Design and Characteristics of thin-film L-C Band Pass Filter

  • Kim In-Sung;Song Jae-Sung;Min Bok-Ki;Lee Won-Jae;Muller Alexandru
    • KIEE International Transactions on Electrophysics and Applications
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    • v.5C no.4
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    • pp.176-179
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    • 2005
  • The increasing demand for high density packaging technologies and the evolution to mixed digital and analogue devices has been the con-set of increasing research in thin film multi-layer technologies such as the passive components integration technology. In this paper, Cu and TaO thin film with RF sputtering was deposited for spiral inductor and MOM capacitor on the $SiO_2$/Si(100) substrate. MOM capacitor and spiral inductor were fabricated for L-C band pass filter by sputtering and lift-off. We are analyzed and designed thin films L-C passive components for band pass filter at 900 MHz and 1.8 GHz, important devices for mobile communication system. Based on the high-Q values of passive components, MOM capacitor and spiral inductors for L-C band pass filter, a low insertion loss of L-C passive components can be realized with a minimized chip area. The insertion loss was 3 dB for a 1.8 GHz filter, and 5 dB for a 900 MHz filter. This paper also discusses a analysis and practical design to thin-film L-C band pass filter.

Analysis on Heat Dissipation Characteristics of a Tile-Type Digital Transmitter/Receiver Module (적층형 디지털송수신모듈의 방열특성 분석)

  • Yoon, Kichul;Kim, Sangwoon;Heo, Jaehun;Kwak, Nojin;Kim, Chan Hong
    • Journal of the Korea Institute of Military Science and Technology
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    • v.22 no.2
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    • pp.249-254
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    • 2019
  • A Digital Transmitter/Receiver Module(DTRM), which is an essential part in active phased-array radar systems, generates a high heat density, and needs to be properly cooled for stable operation. A tile-type DTRM that is a stacking structure of multi-layer components was modeled with simplification and heat dissipation characteristics of the DTRM model were studied using computational fluid dynamics(CFD) simulations. Most of the heat was dissipated by the heat conduction through the cold plate, but the heat transfer by the forced convection on top of the DTRM also was found to play an important role in the thermal management. Under the given conjugated heat transfer environment, the DTRM was confirmed to secure a stable operating temperature range.

Timing Driven Analytic Placement for FPGAs (타이밍 구동 FPGA 분석적 배치)

  • Kim, Kyosun
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.7
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    • pp.21-28
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    • 2017
  • Practical models for FPGA architectures which include performance- and/or density-enhancing components such as carry chains, wide function multiplexers, and memory/multiplier blocks are being applied to academic FPGA placement tools which used to rely on simple imaginary models. Previously the techniques such as pre-packing and multi-layer density analysis are proposed to remedy issues related to such practical models, and the wire length is effectively minimized during initial analytic placement. Since timing should be optimized rather than wire length, most previous work takes into account the timing constraints. However, instead of the initial analytic placement, the timing-driven techniques are mostly applied to subsequent steps such as placement legalization and iterative improvement. This paper incorporates the timing driven techniques, which check if the placement meets the timing constraints given in the standard SDC format, and minimize the detected violations, with the existing analytic placer which implements pre-packing and multi-layer density analysis. First of all, a static timing analyzer has been used to check the timing of the wire-length minimized placement results. In order to minimize the detected violations, a function to minimize the largest arrival time at end points is added to the objective function of the analytic placer. Since each clock has a different period, the function is proposed to be evaluated for each clock, and added to the objective function. Since this function can unnecessarily reduce the unviolated paths, a new function which calculates and minimizes the largest negative slack at end points is also proposed, and compared. Since the existing legalization which is non-timing driven is used before the timing analysis, any improvement on timing is entirely due to the functions added to the objective function. The experiments on twelve industrial examples show that the minimum arrival time function improves the worst negative slack by 15% on average whereas the minimum worst negative slack function improves the negative slacks by additional 6% on average.

Effect of Interface on Thermal Conductivity of Clad Metal through Thickness Direction for Heat Sink (히트 싱크용 클래드메탈에서 두께 방향의 열전도 특성에 미치는 계면의 영향)

  • Kim, Jong-Gu;Kim, Dong-Yong;Kim, Hyun;Hahn, Byung-Dong;Cho, Young-Rae
    • Journal of the Microelectronics and Packaging Society
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    • v.22 no.3
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    • pp.67-72
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    • 2015
  • A study on thermal properties for a single-layer metal and a 2-ply metal (clad metals) was investigated for the application of heat sink. For the single-layer metal, a stainless steel (STS) and an aluminum (Al) were selected. Also, a roll bonded clad metal with STS and Al was chosen for the 2-ply metal. The thermal conductivity of the sample was obtained from the thermal diffusivity measured by the light flash analysis (LFA), specific heat and density. Measured thermal property values were compared with the calculated values using the data from the references. For the single-layer metal, measured values for the thermal diffusivity and thermal conductivity were smaller than calculated values. Differences between measured and calculated values were about 6% and 18% for the STS and Al samples, respectively. For the clad metals, however, a large difference (55%) was observed. Here, a relatively small thermal conductivity measured by LFA was due to the existence of a interface between STS and Al in the clad metal. Such a interface reduces the moving velocity of free electrons and phonons in the clad metal. For the development of a high performance heat-issipation module with the multi-layer structure, the control of interface properties which determine thermal properties was confirmed to be important.

Stress analysis of high-temperature superconducting wire under electrical/magnetic/bending loads

  • Dongjin Seo;Yunjo Jung;Hong-Gun Kim;Hyung-Seop Shin;Young-Soon Kim
    • Progress in Superconductivity and Cryogenics
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    • v.25 no.4
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    • pp.19-23
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    • 2023
  • The Second-generation high-temperature superconducting (HTS) Rare-Earth Barium Copper Oxide (REBCO) wire is a composite laminate having a multi-layer structure (8 or more layers). HTS wires will undergo multiple loads including the bending-tension loads during winding, high current density, and high magnetic fields. In particular, the wires are subjected to bending stress and magnetic field stress because HTS wires are wound around a circular bobbin when making a high-field magnetic. Each of the different laminated wires inevitably exhibits damage and fracture behavior of wire due to stress deformation, mismatches in thermal, physical, electrical, and magnetic properties. Therefore, when manufacturing high-field magnets and other applications, it is necessary to calculate the stress-strain experienced by high-temperature superconducting wire to present stable operating conditions in the product's use environment. In this study, the finite element model (FEM) was used to simulate the strain-stress characteristics of the HTS wire under high current density and magnetic field, and bending loads. In addition, the result of obtaining the neutral axis of the wire and the simulation result was compared with the theoretical calculation value and reviewed. As a result of the simulation using COMSOL Multiphysics, when a current of 100 A was applied to the wire, the current value showed the difference of 10-9. The stress received by the wire was 501.9 MPa, which showed a theoretically calculated value of 500 MPa and difference of 0.38% between simulation and theoretical method. In addition, the displacement resulted is 30.0012 ㎛, which is very similar to the theoretically calculated value of 30 ㎛. Later, the amount of bending stress by the circular mandrel was received for each layer and the difference with the theoretically obtained the neutral axis result was compared and reviewed. This result will be used as basic data for manufacturing high-field magnets because it can be expanded and analyzed even in the case of wire with magnetic flux pinning.

The characteristics of bismuth magnesium niobate multi layers deposited by sputtering at room temperature for appling to embedded capacitor (임베디드 커패시터로의 응용을 위해 상온에서 RF 스퍼터링법에 의한 증착된 bismuth magnesium niobate 다층 박막의 특성평가)

  • Ahn, Jun-Ku;Cho, Hyun-Jin;Ryu, Taek-Hee;Park, Kyung-Woo;Cuong, Nguyen Duy;Hur, Sung-Gi;Seong, Nak-Jin;Yoon, Soon-Gil
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.62-62
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    • 2008
  • As micro-system move toward higher speed and miniaturization, requirements for embedding the passive components into printed circuit boards (PCBs) grow consistently. They should be fabricated in smaller size with maintaining and even improving the overall performance. Miniaturization potential steps from the replacement of surface-mount components and the subsequent reduction of the required wiring-board real estate. Among the embedded passive components, capacitors are most widely studied because they are the major components in terms of size and number. Embedding of passive components such as capacitors into polymer-based PCB is becoming an important strategy for electronics miniaturization, device reliability, and manufacturing cost reduction Now days, the dielectric films deposited directly on the polymer substrate are also studied widely. The processing temperature below $200^{\circ}C$ is required for polymer substrates. For a low temperature deposition, bismuth-based pyrochlore materials are known as promising candidate for capacitor $B_2Mg_{2/3}Nb_{4/3}O_7$ ($B_2MN$) multi layers were deposited on Pt/$TiO_2/SiO_2$/Si substrates by radio frequency magnetron sputtering system at room temperature. The physical and structural properties of them are investigated by SEM, AFM, TEM, XPS. The dielectric properties of MIM structured capacitors were evaluated by impedance analyzer (Agilent HP4194A). The leakage current characteristics of MIM structured capacitor were measured by semiconductor parameter analysis (Agilent HP4145B). 200 nm-thick $B_2MN$ muti layer were deposited at room temperature had capacitance density about $1{\mu}F/cm^2$ at 100kHz, dissipation factor of < 1% and dielectric constant of > 100 at 100kHz.

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Multi-Layered Sintered Porous Transport Layers in Alkaline Water Electrolysis (다층 소결메쉬 확산체를 이용한 알칼라인 수전해 셀)

  • YEOM, SANG HO;YUN, YOUNG HWA;CHOI, SEUNGWOOK;KWON, JIHEE;LEE, SECHAN;LEE, JAE HUN;LEE, CHANGSOO;KIM, MINJOONG;KIM, SANG-KYUNG;UM, SUKKEE;KIM, CHANG-HEE;CHO, WON CHUL;CHO, HYUN-SEOK
    • Transactions of the Korean hydrogen and new energy society
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    • v.32 no.6
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    • pp.442-454
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    • 2021
  • The porous transport layer (PTL) is essential to effectively remove oxygen and hydrogen gas from the electrode surface at high current density operation conditions. In this study, the effect of PTL with different characteristics such as pore size, pore gradient, interfacial coating was investigated by multi-layered sintered mesh. A water electrolysis single cell of active area of the 34.56 cm2 was constructed, and IV performance and impedance analysis were conducted in the range of 0 to 2.0 A/cm2. It was confirmed that the multi-layered sintered mesh PTL, which have an average pore size of 25 to 57 ㎛ and a larger pore gradient, removed bubbles effectively and thus seemed to improve IV performance. Also, it was confirmed that the catalytic metals such as Ni, NiMo coating on the PTL reduced activation overpotential, but increased mass transport overpotential.