• Title/Summary/Keyword: Multi-Core

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The Study of Distributed Processing for Graphics Rendering Engine Based on ARINC 653 Multi-Core System (ARINC 653 멀티코어 기반 그래픽스 렌더링 엔진 분산처리방안 연구)

  • Jung, Mukyoung
    • Journal of Aerospace System Engineering
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    • v.13 no.5
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    • pp.1-8
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    • 2019
  • Recently, avionics has been migrating from a federated architecture to an integrated modular architecture based on a multi-core to reduce the number of systems, weight, power consumption, and platform redundancy. The volume of data which must bo provided to the pilot through the display device has increased, because an integrated single device performs multiple functions. For this reason, the volume of data processed by the graphic processor within a fixed operation period has increased. In this paper, we provide a multi-core-based rendering engine in to perform more graphics processing within a fixed operation period. We assume the proposed method uses a multi-core-based partitioning operating system using the AMP (Asymmetric Multi-Processing) architecture.

Dynamic Power Management Framework for Mobile Multi-core System (모바일 멀티코어 시스템을 위한 동적 전력관리 프레임워크)

  • Ahn, Young-Ho;Chung, Ki-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.7
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    • pp.52-60
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    • 2010
  • In this paper, we propose a dynamic power management framework for multi-core systems. We reduced the power consumption of multi-core processors such as Intel Centrino Duo and ARM11 MPCore, which have been used at the consumer electronics and personal computer market. Each processor uses a different technique to save its power usage, but there is no embedded multi-core processor which has a precise power control mechanism such as dynamic voltage scaling technique. The proposed dynamic power management framework is suitable for smart phones which have an operating system to provide multi-processing capability. Basically, our framework follows an intuitive idea that reducing the power consumption of idle cores is the most effective way to save the overall power consumption of a multi-core processor. We could minimize the energy consumption used by idle cores with application-targeted policies that reflect the characteristics of active workloads. We defined some properties of an application to analyze the performance requirement in real time and automated the management process to verify the result quickly. We tested the proposed framework with popular processors such as Intel Centrino Duo and ARM11 MPCore, and were able to find that our framework dynamically reduced the power consumption of multi-core processors and satisfied the performance requirement of each program.

Lane Detection using Embedded Multi-core Platform (임베디드 멀티코어 플랫폼을 이용한 차선검출)

  • Lee, Kwang-Yeob;Kim, Dong-Han;Park, Tae-Ryoung
    • Journal of IKEEE
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    • v.15 no.3
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    • pp.255-260
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    • 2011
  • In this paper, we propose a parallelization technique in lane detection by using Hough transform. Hough transform has a weakness that it has a lot computation quantity, because it has to compute ${\rho}$ value in all candidate ${\Theta}$ to be detected in an image. We propose an architecture of parallel processing for this transform in a multi-core environment. The parallel processing has application to Hough transform as well as noise reduction and edge detection. This proposed architecture has 5.17 times improvement in performance compare to the existing algorithm.

Efficient Process Network Implementation of Ray-Tracing Application on Heterogeneous Multi-Core Systems

  • Jung, Hyeonseok;Yang, Hoeseok
    • IEIE Transactions on Smart Processing and Computing
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    • v.5 no.4
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    • pp.289-293
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    • 2016
  • As more mobile devices are equipped with multi-core CPUs and are required to execute many compute-intensive multimedia applications, it is important to optimize the systems, considering the underlying parallel hardware architecture. In this paper, we implement and optimize ray-tracing application tailored to a given mobile computing platform with multiple heterogeneous processing elements. In this paper, a lightweight ray-tracing application is specified and implemented in Kahn process network (KPN) model-of-computation, which is known to be suitable for the description of real-time applications. We take an open-source C/C++ implementation of ray-tracing and adapt it to KPN description in the Distributed Application Layer framework. Then, several possible configurations are evaluated in the target mobile computing platform (Exynos 5422), where eight heterogeneous ARM cores are integrated. We derive the optimal degree of parallelism and a suitable distribution of the replicated tasks tailored to the target architecture.

Analysis Method of Transmission Characterization for Multi-layered Composite Material Based on Homogenization Method

  • Hyun, Se-Young;Song, Yong-Ha;Jeoun, Young-Mi;Kim, Bong-Gyu
    • Journal of Aerospace System Engineering
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    • v.15 no.6
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    • pp.59-65
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    • 2021
  • In this paper, the transmission characteristics of the multi-layered composite material with wire mesh and honeycomb core for aircraft applications have been analyzed with the proposed method. The proposed method converts the conductive wire mesh into effective layer, while for the dielectric honeycomb core, effective permittivity has been derived based on volume fraction with the proposed method. The proposed method has been verified through comparison with full-wave simulation and revealed excellent. In addition, the calculation time of the proposed method is a few order of magnitude faster in comparison with the full-wave simulation.

Implementation of Ethernet-Based High-Speed Data Communication for Multi-core DSP (멀티 코어 DSP를 위한 이더넷 기반 고속 데이터 통신 구현)

  • Nguyen, Dung Huy;Choi, Joon-Young
    • IEMEK Journal of Embedded Systems and Applications
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    • v.17 no.3
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    • pp.185-190
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    • 2022
  • We propose a high speed data communication method for motor drive systems with fast control cycle in order to collect state variables of motor control without degrading control performance. Ethernet is chosen for communication device, and multi-core DSP architecture is exploited for communication processing load distribution. The communication program including network protocol stack and motor control program are assigned to two separate cores, and data between two cores are exchanged using interrupt-based inter-process communication mechanism, which enables to achieve a high-speed communication performance without degrading the motor control performance. The performance of developed communication method is demonstrated by real experiments using TCP, UDP and Raw Socket protocols in an experimental setup consisting of TI's TMS320F28388D motor control card and MS Windows PC.

Promoting Strategies by Development Stage of Region Based Agricultural Cluster Using a Multi-disciplinary Approach (다학문적 접근을 통한 지역농업 클러스터의 단계별 추진전략)

  • Choi, Sang-Ho;Choi, Hung-Kyu;Lee, Min-Soo;Choe, Young-Chan
    • Journal of Korean Society of Rural Planning
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    • v.11 no.4 s.29
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    • pp.33-45
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    • 2005
  • This study investigates the core elements of the formation and development of cluster using a multi-disciplinary approach and suggests a promoting strategy by development stage of cluster. As a sub-category of regional innovation system, the cluster has been considered as one of the most noticeable methodological argument to make the regional innovation system come true. In the meantime, this study examines the core elements of cluster shown in the theories and examples through six academic fields such as economics, geography, regional development, business administration, sociology and pedagogy and their educational back-ground. By means of establishing the incubation stage in the development of cluster, core elements are composed in the stages of birth, incubation and evolution in subsequent manner. A promoting strategy will be suggested through the implication of core elements in the reestablished stages.

Low-latency SAO Architecture and its SIMD Optimization for HEVC Decoder

  • Kim, Yong-Hwan;Kim, Dong-Hyeok;Yi, Joo-Young;Kim, Je-Woo
    • IEIE Transactions on Smart Processing and Computing
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    • v.3 no.1
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    • pp.1-9
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    • 2014
  • This paper proposes a low-latency Sample Adaptive Offset filter (SAO) architecture and its Single Instruction Multiple Data (SIMD) optimization scheme to achieve fast High Efficiency Video Coding (HEVC) decoding in a multi-core environment. According to the HEVC standard and its Test Model (HM), SAO operation is performed only at the picture level. Most realtime decoders, however, execute their sub-modules on a Coding Tree Unit (CTU) basis to reduce the latency and memory bandwidth. The proposed low-latency SAO architecture has the following advantages over picture-based SAO: 1) significantly less memory requirements, and 2) low-latency property enabling efficient pipelined multi-core decoding. In addition, SIMD optimization of SAO filtering can reduce the SAO filtering time significantly. The simulation results showed that the proposed low-latency SAO architecture with significantly less memory usage, produces a similar decoding time as a picture-based SAO in single-core decoding. Furthermore, the SIMD optimization scheme reduces the SAO filtering time by approximately 509% and increases the total decoding speed by approximately 7% compared to the existing look-up table approach of HM.

Effect of Multi-Swirl Injector on Acoustic Damping in Model Combustion Chamber (모형 연소실에 장착된 다중 스월인젝터의 음향학적 감쇠 효과)

  • Kim, Hyun-Sung;Kim, Byung-Sun;Yoon, Young-Bin
    • Proceedings of the Korean Society of Propulsion Engineers Conference
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    • 2007.11a
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    • pp.198-203
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    • 2007
  • The aim of this study is to suppress the high-frequency combustion instability by acoustic absorption through swirl injector with variable air core length. In the previous study, acoustic damping effects on air core (length, shape, volume) and location of the injector in a model chamber were investigated. Through previous results, our study has advanced to the effect of tuned multi-injectors. From the experimental data, it is proved that increasing of numbers of injectors mounted each anti-node point can increase acoustic damping effect. Also, when tuned injectors at 1L, 1T, 1L1T modes simultaneously are installed each anti-node point of model chamber, damping effect of tuned injectors with multi modes is well agreed with it of tuned injectors with single mode.

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Energy-Efficient Multi- Core Scheduling for Real-Time Video Processing (실시간 비디오 처리에 적합한 에너지 효율적인 멀티코어 스케쥴링)

  • Paek, Hyung-Goo;Yeo, Jeong-Mo;Lee, Wan-Yeon
    • Journal of the Korea Society of Computer and Information
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    • v.16 no.6
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    • pp.11-20
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    • 2011
  • In this paper, we propose an optimal scheduling scheme that minimizes the energy consumption of a real-time video task on the multi-core platform supporting dynamic voltage and frequency scaling. Exploiting parallel execution on multiple cores for less energy consumption, the propose scheme allocates an appropriate number of cores to the task execution, turns off the power of unused cores, and assigns the lowest clock frequency meeting the deadline. Our experiments show that the proposed scheme saves a significant amount of energy, up to 67% and 89% of energy consumed by two previous methods that execute the task on a single core and on all cores respectively.