• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.6
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• pp.539-546
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• 1999

A new integrated single-stage zero current switched(ZCS) quasi resonant convertedQRC) for the IX)wer f factor correction(PFCl converter is introduced in this paper. The power factor correction can be achieved by t the discontinuous conduction mod$\varepsilon$(DCM) operation of an input current. The proposed converter has the c characteristics of the good IX)wer factor, 10씨 line current harmonics, and tight output regulation. Furthern10re, t the ringing effect due to the output capacitance of the main switch can be eliminated by use of‘ active clamp c circuit. Therefore, the proIX)sed converter is expecttc'(] to be suitable for a compact power converter with a t tightly regulated output voltage requiring a switching frequency of more than several hundrtc'(]s kHz.

• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.5
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• pp.491-497
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• 2004

This paper presents a new rotor position estimation method for brushless DC motors. It is clear that the estimation error of the rotor position provokes the phase shift angle misaligned between the phase current and the back-EMF waveforms, which causes torque ripple in brushless DC motor drives. Such an estimation error can be reduced with the help of the proposed neutral voltage-based estimation method that is structured in the form of a closed loop observer. A neutral voltage appearing during the normal mode of the inverter operation is found to be an observable and controllable measure, which can be dealt with for estimating an exact rotor position. This neutral voltage is obtained from the DC-link current, the switching logic, and the motor speed values. The proposed algorithm, which can be implemented easily by using a single DC-link current and the motor terminal voltage sensors, is verified by simulation and experiment results.

• Journal of the Korean Society of Industry Convergence
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• v.21 no.6
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• pp.265-271
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• 2018

DC-DC buck converter is a critical building block in the power management integrated circuit (PMIC) architecture for the portable devices such as cellular phone, personal digital assistance (PDA) because of its power efficiency over a wide range of conversion ratio. To ensure a safe operation, avoid unexpected damages and enhance the reliability of the converter, fully-integrated protection circuits such as over voltage protection (OVP), under voltage lock out (UVLO), startup, and thermal shutdown (TSD) blocks are designed. In this paper, these three fully-integrated protection circuit blocks are proposed for use in the DC-DC buck converter. The buck converter with proposed protection blocks is operated with a switching frequency of 1 MHz in continuous conduction mode (CCM). In order to verify the proposed scheme, the buck converter has been designed using a 180 nm CMOS technology. The UVLO circuit is designed to track the input voltage and turns on/off the buck converter when the input voltage is higher/lower than 2.6 V, respectively. The OVP circuit blocks the buck converter's operation when the input voltage is over 3.3 V, thereby preventing the destruction of the devices inside the controller IC. The TSD circuit shuts down the converter's operation when the temperature is over $85^{\circ}C$. In order to verify the proposed scheme, these protection circuits were firstly verified through the simulation in SPICE. The proposed protection circuits were then fabricated and the measured results showed a good matching with the simulation results.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.1
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• pp.1-9
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• 1986

This is the third part of the four-part paper describing the development of a packet-switched computer communication network named the KORNET. In this paper we describe the design and implementation of the X.25 protocol connecting packet mode data terminal equipments(PDTE's) with data circuit terminating equipments(DCE's). In the KORNET, the X.25 protocol has been implemented on the line processing module-A(LPMA) of the network node processor(NNP). In the implementation of X.25, we have divided the software module according to the service function, and have determined the the rules that interact between the modules. Each layer protocol has been developed using the technique of the finite state machine. Before the actual coding of softwares, we hafve used formal software development tools based on the specification and description language (SDL) and program design languate (PDL) recommended by the CCITT. In addition, for the efficient operation of the X.25 protocol system we have analyzed the system performance and the service scheduling method of each module. The results will also be given.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.1
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• pp.10-19
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• 1986

This is the last part of the four-part describing the development of a packet-switched computer communication network named the KORNET. In this paper we describe the design and implementation of the packet assembler/dissassembler (PAD) protocol for the asynchronous channel service, and of the network management softwares. The line processing module-B(LPMB) system supporting the asynchronous line includes a PAD protocol, a packet mode DTE/DCE protocol converting to the X.25 protocol, and the asynchronous receiver/transmitter(ART) software. The network management software is operated in master central processing module(MCPM) which includes virtual circuit management (VCM) managing the user channel, the routing management and the high level protocol for communication between the network management center (NMC) and the network node processor(NNP). In this paper, the design, implementation and operation of the softwares for the above service functions will be described in detail.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.7 no.6
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• pp.63-69
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• 2008

Reconfigurable RF one-chip solutions have been researched with the objective of designing for smaller-sized and more economical RF transceiver and it can be applied to a vehicular wireless terminal. The proposed voltage-controlled oscillator satisfies the targeted frequency range ($4.2{\sim}5.4\;GHz$) and the frequency planning which correspond to the standards such as CDMA(IS-95), PCS, GSM850, EGSM, WCDMA, WLAN, Bluetooth, WiBro, S-DMB, DSRC, GPS, and DVB-H/DMB-H/L(L Band). In order to improve phase noise performance, PMOS is adopted in the cross-coupled pair, the tail current source and MOS varactor in this VCO and differential-typed switching is proposed in capacitor array. Based on the measurement results, a total power dissipation is $5.3{\sim}6.0\;mW$ at 1.8 V power supply voltage. The oscillator is tuned from 4.05 to 5.62 GHz; The tuning range is 33%. The phase noise is -117.16 dBc/Hz at 1 MHz offset frequency and the FOM (Figure Of Merit) is $-180.84{\sim}-180.5$.

• The Journal of Engineering Geology
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• v.19 no.3
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• pp.351-363
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• 2009

Two orthogonal joint sets develop well only in sandstone beds in the sandstone-mudstone sequences of Gumi and Dasa outcrops within Cretaceous Gyeongsang Basin. And various joint data are similar in the beds of the same thickness in both outcrops, meaning that the joint sets were homogeneously produced by extensional deformation in the same regional stress field. Most of joints in the sandstone beds are orthogonal to, and confined by bed boundaries, which are believed to be formed by hydrofracturing during consolidation after burial. Two orthogonal joint sets are considered to be almost coeval on the basis of mutual abutting relationship which makes up fracture grid-lock and a product of rapid switching of ${\sigma}_2$ and ${\sigma}_3$ axes with constant ${\sigma}_1$ direction oriented to vertical. The joint sets in the sandstone beds show planar surfaces, parallel orientations and regular spacing, with joint spacing linearly proportional to bed thickness. The spacing distributions of the joints seem to correspond to log-normal to almost normal distribution in most of the beds. But multilayer joints do not display regular spacing and dominant size. Either joint set in this study is characterized by a high level of joint density and a saturated spacing distribution as indicated by the mode/mean ratio values and the Cv(coefficient of variance) values. Joint aperture tends to increase with the vertical length of the joints controlled by bed thickness.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.9
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• pp.4177-4185
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• 2012

LEDs are becoming the most suitable candidate replacing traditional fluorescent lamps because of its eco-friendly characteristics. LEDs are also actively used to design green building system and to make outdoor billboard as a back-light system due to its high energy efficiency. In this paper, we have developed AC direct driver for $12{\times}12$ FLB(flexible LED board) and LED flat light without SMPS. It has LID-PC-R101B driver IC that can support the high power factor and be composed of LED switching circuit in group. Also, an elaborate system designs can guarantee a high luminous efficiency, a high reliability and a low power consumption. The proposed FLB has the ultra slim shape of $450{\times}450$ mm, width of 4 mm and weight of 280 g. In the end, we have developed a prototype of FLB for billboard and flat light for room lighting with AC direct driver iposrder to verify the performance of the proposed system.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.3
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• pp.518-526
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• 2017

This study analyzed the impact of family firms and their characteristics on how they use debts to analyze the decision-making process of Korean family firms. For analysis, we classified the characteristics of family firms into three categories, through the influence of the relationship between the lack of funds and net debt issuance, which was confirmed as the 'packing order theory' of family firms. There was a total of 4,503 enterprises in the Korean Exchange (KRX). The period of analysis was 10 years, between 2004 and 2014. To summarize, Shyam-Sunder and Myers (1999) validated the packing order theory by presenting a model of family businesses that showed greater applicable to higher packing order theory than a model of non-family businesses. Moreover, the results also confirmed the application of the packing order theory by the family stronger corporate governance and ownership structure. The ownership and governance characteristics of the ruling family has also shown the applicability of higher packing order theory.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.5
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• pp.62-70
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• 2007

In this paper, the boost Power Factor Correction(PFC) technique for Direct Torque Control(DTC) of brushless DC motor drive in the constant torque region is implemented on a TMS320F2812DSP. Unlike conventional six-step PWM current control, by properly selecting the inverter voltage space vectors of the two-phase conduction mode from a simple look-up table at a predefined sampling time, the desired quasi-square wave current is obtained, therefore a much faster torque response is achieved compared to conventional current control. Furthermore, to eliminate the low-frequency torque oscillations caused by the non-ideal trapezoidal shape of the actual back-EMF waveform of the BLDC motor, a pre-stored back-EMF versus position look-up table is designed. The duty cycle of the boost converter is determined by a control algorithm based on the input voltage, output voltage which is the dc-link of the BLDC motor drive, and inductor current using average current control method with input voltage feed-forward compensation during each sampling period of the drive system. With the emergence of high-speed digital signal processors(DSPs), both PFC and simple DTC algorithms can be executed during a single sampling period of the BLDC motor drive. In the proposed method, since no PWM algorithm is required for DTC or BLDC motor drive, only one PWM output for the boost converter with 80 kHz switching frequency is used in a TMS320F2812 DSP. The validity and effectiveness of the proposed DTC of BLDC motor drive scheme with PFC are verified through the experimental results. The test results verify that the proposed PFC for DTC of BLDC motor drive improves power factor considerably from 0.77 to as close as 0.9997 with and without load conditions.