• Journal of the Microelectronics and Packaging Society
• /
• v.8 no.1
• /
• pp.39-43
• /
• 2001

$SiC_{x}N$_{y}$ film is deposited by electron cyclotron resonance plasma chemical vapor deposition system using $SiH_4$(5% in Ar), $CH_4$ and $N_2$. Ternary phase $SiC_{x}N$_{y}$ thin film deposited at the microwave power of 600 W and substrate temperature of 700 contains considerable amount of strong C-N bonds. Change in $CH_4$flow rate can effectively control the residual film stress, and typical surface roughness of 34.6 (rms) was obtained. Extreme]y high hardness (3952 Hv) and optical transmittance (95% at 633 nm) was achieved, which is suitable for a LIGA mask membrane application.

• Journal of the Semiconductor & Display Technology
• /
• v.22 no.3
• /
• pp.46-51
• /
• 2023

We investigated the MoS₂ thin film layer by thermolytic deposition and applied it to the silicon solar cells. MoS₂ thin films were made by two methods of dipping and spin coating of (NH₄)₂MoS₄ precursor solution. We implemented two types of substrates of microtextured and nano-microtextured 6-in. Si pn junction wafers. The fabricated MoS₂ thin film layer was analyzed, and solar cells were fabricated by applying the standard silicon solar cell process. The MoS₂ thin film layer of sulfur-deficient form was deposited on the n-type emitter layer, and electrons, which are minority carriers, were well transported at the interface and exhibited photovoltaic solar cell characteristics. The cell efficiencies were achieved at 5% for microtextured wafers and 2.56% for nano-microtextured wafers.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2010.06a
• /
• pp.351-351
• /
• 2010

Nanoscale patterning using an atomic force microscope tip induced scratching was systematically investigated in AI thin film on 4H-SiC. To identify the effects of the scratch parameters, including the tip loading force, scratch speed, and number of scratches, we varied each parameters and evaluated the major parameter which has intimate relationship with the scale of patterns. In this work, we present the successful demonstration of nano patterning of Al thin film on a 4H-SiC substrate using an AFM scratching and evaluated the scratch parameters on Al/4H-SiC.

• Korean Journal of Materials Research
• /
• v.24 no.9
• /
• pp.443-450
• /
• 2014

Amorphous (a-Si) films were epitaxially crystallized on a very thin large-grained poly-Si seed layer by a silicide-enhanced rapid thermal annealing (SERTA) process. The poly-Si seed layer contained a small amount of nickel silicide which can enhance crystallization of the upper layer of the a-Si film at lower temperature. A 5-nm thick poly-Si seed layer was then prepared by the crystallization of an a-Si film using the vapor-induced crystallization process in a $NiCl_2$ environment. After removing surface oxide on the seed layer, a 45-nm thick a-Si film was deposited on the poly-Si seed layer by hot-wire chemical vapor deposition at $200^{\circ}C$. The epitaxial crystallization of the top a-Si layer was performed by the rapid thermal annealing (RTA) process at $730^{\circ}C$ for 5 min in Ar as an ambient atmosphere. Considering the needle-like grains as well as the crystallization temperature of the top layer as produced by the SERTA process, it was thought that the top a-Si layer was epitaxially crystallized with the help of $NiSi_2$ precipitates that originated from the poly-Si seed layer. The crystallinity of the SERTA processed poly-Si thin films was better than the other crystallization process, due to the high-temperature RTA process. The Ni concentration in the poly-Si film fabricated by the SERTA process was reduced to $1{\times}10^{18}cm^{-3}$. The maximum field-effect mobility and substrate swing of the p-channel poly-Si thin-film transistors (TFTs) using the poly-Si film prepared by the SERTA process were $85cm^2/V{\cdot}s$ and 1.23 V/decade at $V_{ds}=-3V$, respectively. The off current was little increased under reverse bias from $1.0{\times}10^{-11}$ A. Our results showed that the SERTA process is a promising technology for high quality poly-Si film, which enables the fabrication of high mobility TFTs. In addition, it is expected that poly-Si TFTs with low leakage current can be fabricated with more precise experiments.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2007.11a
• /
• pp.75-76
• /
• 2007

Poly-Si Schottky barrier Thin Film Transistor (SB-TFT) is manufactured with erbium silicided source/drain. High quality poly-Si film was obtained by crystallizing the amorphous Si film with Excimer laser annealing (ELA) method. The fabricated poly-Si SB-TFT devices showed low leakage current and large on/off current ratio. Moreover, the electrical characteristics were considerably improved by 3% $H_2/N_2$ gas annealing, which is attributed to the reduction of trap states at the grain boundaries and interface trap states at gate oxide/poly-si channel.

• Journal of Information Display
• /
• v.2 no.3
• /
• pp.72-77
• /
• 2001

Amorphous silicon thin-film transistors (a-Si TFTs) were incorporated into Mo-tip-based triode-type field emitters and diode-type ones of carbon nanotubes for an active-matrix cathode (AMC) plate of field emission displays. Also, we developed a novel surface-treatment process for the Mo-tip fabrication, which gleatly enhanced in the stability of field emission. The field emission currents of AMC plates on glass substrate were well controlled by the gate bias of a-Si TFTs. Active-matrix field emission displays (AMFEDs) with these AMC plates were demonstrated in a vacuum chamber, showing low-voltage matrix addressing, good stability and reliability of field emission, and highly uniform light emissions from the anode plate with phosphors. The optimum design of AMFEDs including a-Si TFTs and a new light shield/focusing grid is discussed.

• Journal of the Korean institute of surface engineering
• /
• v.44 no.6
• /
• pp.264-268
• /
• 2011

The Molybedenium thin film is generally used on back contact material of CIGS solar cell due to low electrical resistivity and stable thermal expansion coefficient. The Mo thin films deposited on si wafer by the magnetron sputtering method. The research focused on the variation of electrical resistivity of films which deposited with various working pressure at the target power of 2.0 kW(8.4 W/). The lowest resistivity of Mo thin film showed $9.0{\mu}O$-cm at pressure of 1.5 mTorr. However, working pressure increasing up to 50 mTorr, resistivities were highly increased. The results showed that the conductivity of Mo films depended on growing structures and defects in deposition process. Surface morphology, porosity, grain size, oxidation, and bonding structures were analysed by SEM, AFM, spectroscopic ellipsometry (SE), XRD, and XPS.

• ETRI Journal
• /
• v.24 no.4
• /
• pp.290-298
• /
• 2002

We present, for the first time, a prototype active-matrix field emission display (AMFED) in which an amorphous silicon thin-film transistor (a-Si TFT) and a molybdenum-tip field emitter array (Mo-tip FEA) were monolithically integrated on a glass substrate for a novel active-matrix cathode (AMC) plate. The fabricated AMFED showed good display images with a low-voltage scan and data signals irrespective of a high voltage for field emissions. We introduced a light shield layer of metal into our AMC to reduce the photo leakage and back channel currents of the a-Si TFT. We designed the light shield to act as a focusing grid to focus emitted electron beams from the AMC onto the corresponding anode pixel. The thin film depositions in the a-Si TFTs were performed at a high temperature of above 360°C to guarantee the vacuum packaging of the AMC and anode plates. We also developed a novel wet etching process for $n^+-doped$ a-Si etching with high etch selectivity to intrinsic a-Si and used it in the fabrication of an inverted stagger TFT with a very thin active layer. The developed a-Si TFTs performed well enough to be used as control devices for AMCs. The gate bias of the a-Si TFTs well controlled the field emission currents of the AMC plates. The AMFED with these AMC plates showed low-voltage matrix addressing, good stability and reliability of field emission, and good light emissions from the anode plate with phosphors.

• Journal of the Microelectronics and Packaging Society
• /
• v.25 no.4
• /
• pp.101-104
• /
• 2018

An electric field was applied to a Mo conductive layer in the sandwiched structure of $glass/SiO_2/Mo/SiO_2/a-Si$ to induce Joule heating in order to generate the intense heat needed to carry out the crystallization of amorphous silicon. Polycrystalline silicon was produced via Joule heating through a solid state transformation. Blanket crystallization was accomplished within the range of millisecond, thus demonstrating the possibility of a new crystallization route for amorphous silicon films. The grain size of JIC poly-Si can be varied from few tens of nanometers to the one having the larger grain size exceeding that of excimer laser crystallized (ELC) poly-Si according to transmission electron microscopy. We report here the blanket crystallization of amorphous silicon films using the $2^{nd}$ generation glass substrate.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.25 no.2
• /
• pp.121-124
• /
• 2012

The characteristics of Ga-doped zinc oxide (GZO) thin films deposited at different deposition temperatures (TS~250 to $550^{\circ}C$) on 4H-SiC have been investigated. Structural and electrical properties of GZO thin film on n-type 4H-SiC(0001) were investigated by using x-ray diffraction(XRD), atomic force microscopy(AFM), Hall effect measurement, barrier height from I-V curve and Auger electron spectroscopy(AES). XRD $2\theta$ scan shows GZO thin film has preferential orientation with c-axis perpendicular to SiC substrate surface. The lowest resistivity ($\sim1.9{\times}10^{-4}{\Omega}cm$) was observed for the GZO thin film deposited at $400^{\circ}C$. As deposition temperature increases, barrier height between GZO and SiC was increased. Whereas, resistivity of GZO thin films as well as barrier height between GZO and SiC were increased after annealing process in air atmosphere. It has been found that the c-axis oriented crystalline quality as well as the relative amount of activated Ga3+ ions and oxygen vacancy may affect the electrical properties of GZO films on SiC.