• Proceedings of the IEEK Conference
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• 2002.07b
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• pp.1296-1299
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• 2002

We implemented a CD signal processor operated on a CAV 48-speed CD-ROM drive into a VLSI. The CD signal processor is a mixed mode monolithic IC including servo-processor, data recovery, data-processor, and I-bit DAC. For servo signal processing, we included a DSP core, while, for CAV mode playback, we adopted a PLL with a wide recovery range. Data processor (DP) was designed to meet the yellow book specification.［2］So, the DP block consists of EFM demodulator, C1/C2 ECC block, audio processor and a block transferring data to an ATAPI chip. A modified Euclid's algorithm was used as a key equation solver for the ECC block To achieve the high-speed decoding, the RS decoder is operated by a pipelined method. Audio playability is increased by playing a CD-DA disc at the speed of 12X or 16X. For this, subcode sync and data are processed in the same way as main data processing. The overall performance of IC is verified by measuring a transfer rate from the innermost area of disc to the outermost area. At 48-speed, the operating frequency is 210 ㎒, and this chip is fabricated by 0.35 um STD90 cell library of Samsung Electronics.

• Proceedings of the KSR Conference
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• 2008.11b
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• pp.310-315
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• 2008

Authors design a rotary-type small-scaled linear induction motor(LIM) and a performance test machine before manufacturing a real-scaled LIM for a railway transit. The designed LIM is a single-sided, short primary type and its primary has 4 poles. The rated power is 10(kW). In order to analyze characteristics of the LIM, authors use a mixed 2D-3D FEM analysis. 3-D FEM analysis is used for calculating a distribution of eddy-current on the semi-caped AL-sheet of the secondary reaction. Authors calculate a correction factor of conductivity and an equivalent conductivity on the secondary AL-sheet using a normalized eddy-current. The equivalent conductivity which is calculated in this way includes a transverse edge-effect of the LIM. Authors apply the equivalent conductivity on the secondary AL-sheet of 2D-FEM model and get performance characteristics of the LIM. Basic characteristics such as thrust and normal force, input current, efficiency and power factor of the LIM have been analyzed with the variation of frequency and speed. In order to apply an air-gap control system, the variation of the basic characteristics have been analyzed with the air-gap length variation of the LIM. Finally, authors introduce an operation mode using the air-gap control system and conduct a research on feasibility of the system.

• Coupled systems mechanics
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• v.2 no.1
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• pp.23-51
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• 2013

An analytical algorithm for the estimation of the resistance forces exerted on the dipper of a cable shovel and the specific energy consumed in the cutting-loading process is presented. Forces due to payload and to cutting of geomaterials under given initial conditions, cutting trajectory of the bucket, bucket's design, and geomaterial properties are analytically computed. The excavation process has been modeled by means of a kinematical shovel model, as well as of dynamic payload and cutting resistance models. For the calculation of the cutting forces, a logsandwich passive failure mechanism of the geomaterial is considered, as has been found by considering that a slip surface propagates like a mixed mode crack. Subsequently, the Upper-Bound theorem of Limit Analysis Theory is applied for the approximate calculation of the maximum reacting forces exerted on the dipper of the cable shovel. This algorithm has been implemented into an Excel$^{TM}$ spreadsheet to facilitate user-friendly, "transparent" calculations and built-in data analysis techniques. Its use is demonstrated with a realistic application of a medium-sized shovel. It was found, among others, that the specific energy of cutting exhibits a size effect, such that it decreases as the (-1)-power of the cutting depth for the considered example application.

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2002.05a
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• pp.185-192
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• 2002

This paper focused on the dynamic behavior of camshaft in a direct acting type valve train system. To investigate camshaft behavior, transient vibration analysis is performed by using the transfer matrix method. The camshaft is treated as lumped mass system supported by spring and damper. Front the presented analytical model, we could predict dynamic behavior of camshaft, shaft locus within bearing and bearing load. The presented mode and results will be very helpful to design the optimal camshaft and valve train system.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.919-922
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• 2003

This paper presents a novel low power driving circuit for passive matrix organic lighting emitting diodes (OLED) displays. The proposed driving method for a low power OLED driving circuit which reduce large parasitic capacitance in OLED panel only use current driving method, instead of mixed mode driving method which uses voltage pre-charge technique. The driving circuit is implemented to one chip using 0.35${\mu}{\textrm}{m}$ CMOS process with 18V high voltage devices and it is applicable to 96(R.G.B)X64, 65K color OLED displays for mobile phone application. The maximum switching power dissipation of driving power dissipation is 5.7mW and it is 4% of that of the conventional driving circuit.

• ETRI Journal
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• v.21 no.4
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• pp.9-22
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• 1999

This paper considers a problem of configuring both physical backbone and logical virtual path (VP) networks in a reconfigurable asynchronous transfer mode (ATM) network where links are subject to failures. The objective is to determine jointly the VP assignment, the capacity assignment of physical links and the bandwidth allocation of VPs, and the routing assignment of traffic demand at least cost. The network cost includes backbone link capacity expansion cost and penalty cost for not satisfying the maximum throughput of the traffic due to link failures or insufficient link capacities. The problem is formulated as a zero-one non-linear mixed integer programming problem, for which an effective solution procedure is developed by using a Lagrangean relaxation technique for finding a lower bound and a heuristic method exploited for improving the upper bound of any intermediate solution. The solution procedure is tested for its effectiveness with various numerical examples.

• Transactions of the Korean Society of Mechanical Engineers
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• v.18 no.6
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• pp.1448-1454
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• 1994

Data which gathered and used in the field of fatigue and fracture mechanics have a lot of uncertainties. In this case, those uncertainties will make scatter band in evaluation of fatigue life and fracture toughness. Thus, the probabilistic analysis of these data will be needed. For determining the fatigue life in mixed mode, using crack direction law and fatigue crack growth law, the problem is studied as a constrained life minimization. Stress intensity factor(SIF) is computed by approximate solution table(Ewalds/Wanhill 1984) and 0th order PFEM. The variance of fatigue life and SIF are computed by differentiation of tabulated approximate solution and 1st order PFEM. And these are used for criterion of design values, principal parameter determination and modelling. The problem of center cracked plate is solved for checking the PFEM model which is influenced by various parameters like as initial crack length, final crack length, two fatigue parameters in Paris Equation and applied stress.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.105-108
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• 2001

4 32-bit RISC core is designed for embedded application and DSP. This processor offers low power consumption by fully static operation and compact code size by efficient instruction set. Processor performance is improved by wing conditional instruction execution, block data transfer instruction, multiplication instruction, bunked register file structure. To support compact code size of embedded application, It is capable cf executing both 16-bit instructions and 32-bit instruction through mixed mode instruction conversion Furthermore, for fast MAC operation for DSP applications, the processor has a dedicated hardware multiplier, which can complete a 32-bit by 32-bit integer multiplication within seven clock cycles. These result in high instruction throughput and real-time interrupt response. This chip is implemented with 0.35${\mu}{\textrm}{m}$, 4- metal CMOS technology and consists of about 50K gate equivalents.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.3
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• pp.139-144
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• 2003

We report the results of extensive mixed mode simulations and theoretical analysis to quantify the contribution of the edge direct tunneling (EDT) current on the total gate leakage current of 80nm NMOSFET with SiO2 gate dielectric. It is shown that EDT has a profound impact on basic analog circuit building blocks such as sample-hold (S/H) circuit and the current mirror circuit. A transistor design methodology with zero gate-source/drain overlap is proposed to mitigate the EDT effect. This results in lower voltage droop in S/H application and better current matching in current mirror application. It is demonstrated that decreasing the overlap length also improves the basic analog circuit performance metrics of the transistor. The transistor with zero gate-source/drain overlap, results in better transconductance, input resistance, output resistance, intrinsic gain and unity gain transition frequency.

• Proceedings of the KSME Conference
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• 2004.04a
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• pp.828-833
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• 2004

The performance of a mixed $H_{\infty}/H_2$ design with pole placement constraints based on robust vibration control for a piezo/beam system is investigated. The governing equation of motion for the piezo/beam system is derived by Hamilton's principle. The assumed mode method is used to discretize the governing equation into a set of ordinary differential equation. A robust controller is designed by $H_{\infty}/H_2$ feedback control law that satisfies additional constraints on the closed-loop pole location in the face of model uncertainties, which are derived for a general class of convex regions of the complex plane. These constraints are expressed in terms of linear matrix inequalities (LMIs) approach for the multiobjective synthesis. The validity and applicability of this approach for vibration suppressions of SMART structural systems are discussed by damping out the multiple vibrational modes of the piezo/beam system.