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Liver transplantation in a child with acute liver failure resulting from drug rash with eosinophilia and systemic symptoms syndrome

  • Song, Seung Min;Cho, Min Sung;Oh, Seak Hee;Kim, Kyung Mo;Park, Young Seo;Kim, Dae Yeon;Lee, Sung Gyu
    • Clinical and Experimental Pediatrics
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    • v.56 no.5
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    • pp.224-226
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    • 2013
  • Drug rash with eosinophilia and systemic symptoms (DRESS) syndrome is characterized by a severe idiosyncratic reaction including rash and fever, often with associated hepatitis, arthralgias, lymph node enlargement, or hematologic abnormalities. The mortality rate is approximately 10%, primarily owing to liver failure with massive or multiple disseminated focal necrosis. Here, we report a case of a 14-year-old girl treated with vancomycin because of a wound infection by methicillin-resistant Staphylococcus aureus, who presented with non-specific symptoms, which progressed to acute liver failure, displaying the hallmarks of DRESS syndrome. With the presence of aggravated hepatic encephalopathy and azotemia, the patient was refractory to medical treatments, she received a living-donor liver transplantation, and a cure was achieved without any sign of recurrence. Vancomycin can be a cause of DRESS syndrome. A high index of suspicion and rapid diagnosis are necessary not to miss this potentially lethal disease.

Cache and Pipeline Architecture Improvement and Low Power Design of Embedded Processor (임베디드 프로세서의 캐시와 파이프라인 구조개선 및 저전력 설계)

  • Jung, Hong-Kyun;Ryoo, Kwang-Ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.10a
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    • pp.289-292
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    • 2008
  • This paper presents a branch prediction algorithm and a 4-way set-associative cache for performance improvement of OpenRISC processor and a clock gating algorithm using ODC (Observability Don't Care) operation for a low-power processor. The branch prediction algorithm has a structure using BTB(Branch Target Buffer) and 4-way set associative cache has lower miss rate than direct-mapped cache. The clock gating algorithm reduces dynamic power consumption. As a result of estimation of performance and dynamic power, the performance of the OpenRISC processor using the proposed algorithm is improved about 8.9% and dynamic power of the processor using samsung $0.18{\mu}m$ technology library is reduced by 13.9%.

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Integrated Stochastic Admission Control Policy in Clustered Continuous Media Storage Server (클리스터 기반 연속 미디어 저장 서버에서의 통합형 통계적 승인 제어 기법)

  • Kim, Yeong-Ju;No, Yeong-Uk
    • The KIPS Transactions:PartA
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    • v.8A no.3
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    • pp.217-226
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    • 2001
  • In this paper, for continuous media access operations performed by Clustered Continuous Media Storage Server (CCMSS) system, we present the analytical model based on the open queueing network, which considers simultaneously two critical delay factors, the disk I/O and the internal network, in the CCMSS system. And we derive by using the analytical model the stochastic model for the total service delay time in the system. Next, we propose the integrated stochastic admission control model for the CCMSS system, which estimate the maximum number of admittable service requests at the allowable service failure rate by using the derived stochastic model and apply the derived number of requests in the admission control operation. For the performance evaluation of the proposed model, we evaluated the deadline miss rates by means of the previous stochastic model considering only the disk I/O and the propose stochastic model considering the disk I/O and the internal network, and compared the values with the results obtained from the simulation under the real cluster-based distributed media server environment. The evaluation showed that the proposed admission control policy reflects more precisely the delay factors in the CCMSS system.

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Integrating Deadline with Laxity for Real-time Scheduling in Multiprocessor Systems (다중처리기 시스템에서 데드라인과 여유시간을 통합한 실시간 스케줄링 기법)

  • 조성제
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.11
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    • pp.611-621
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    • 2002
  • For real-time systems, multiprocessor support is indispensable to handle the large number of requests. Existing real-time on-line scheduling algorithms such as Earliest Deadline First Algorithm (EDF) and Least Laxity Algorithm (LLA) may not be suitable for scheduling real-time tasks in multiprocessor systems. Although EDF has low context switching overhead, it suffers from "multiple processor anomalies." LLA has been shown as suboptimal, but has the potential for higher context switching overhead. Earliest Deadline Zero Laxity (EDZL) solved somewhat the problems of those algorithms, however is suboptimal for only two processors. Another algorithm EDA2 shows very good performance in overload phase, however, is not suboptimal for muitiprocessors. We propose two on-line scheduling algorithms, Earliest Deadline/Least Laxity (ED/LL) and ED2/LL. ED/LL is suboptimal for multiprocessors, and has low context switching overhead and low deadline miss rate in normal load phase. However, ED/LL is ineffective when the system is overloaded. To solve this problem, ED2/LL uses ED/LL or EDZL in normal load phase and uses EDA2 in overload phase. Experimental results show that ED2/LL achieves good performance in overload phase as wet] as in normal load phase.oad phase.

Performance and Power Consumption Improvement of Embedded RISC Core (임베디드 RISC 코어의 성능 및 전력 개선)

  • Jung, Hong-Kyun;Ryoo, Kwang-Ki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.14 no.2
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    • pp.453-461
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    • 2010
  • This paper presents a branch prediction algorithm and a 4-way set-associative cache for performance improvement of embedded RISC core and a clock-gating algorithm using ODC (Observability Don't Care) operation to improve the power consumption of the core. The branch prediction algorithm has a structure using BTB(Branch Target Buffer) and 4-way set associative cache has lower miss rate than direct-mapped cache. Pseudo-LRU Policy, which is one of the Line Replacement Policies, is used for decreasing the number of bits that store LRU value. The clock gating algorithm reduces dynamic power consumption. As a result of estimation of performance and dynamic power, the performance of the OpenRISC core applied the proposed architecture is improved about 29% and dynamic power of the core using Chartered $0.18{\mu}m$ technology library is reduced by 16%.

Low-Power Data Cache Architecture and Microarchitecture-level Management Policy for Multimedia Application (멀티미디어 응용을 위한 저전력 데이터 캐쉬 구조 및 마이크로 아키텍쳐 수준 관리기법)

  • Yang Hoon-Mo;Kim Cheong-Gil;Park Gi-Ho;Kim Shin-Dug
    • The KIPS Transactions:PartA
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    • v.13A no.3 s.100
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    • pp.191-198
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    • 2006
  • Today's portable electric consumer devices, which are operated by battery, tend to integrate more multimedia processing capabilities. In the multimedia processing devices, multimedia system-on-chips can handle specific algorithms which need intensive processing capabilities and significant power consumption. As a result, the power-efficiency of multimedia processing devices becomes important increasingly. In this paper, we propose a reconfigurable data caching architecture, in which data allocation is constrained by software support, and evaluate its performance and power efficiency. Comparing with conventional cache architectures, power consumption can be reduced significantly, while miss rate of the proposed architecture is very similar to that of the conventional caches. The reduction of power consumption for the reconfigurable data cache architecture shows 33.2%, 53.3%, and 70.4%, when compared with direct-mapped, 2-way, and 4-way caches respectively.

Discrepancies Between Implementation and Perceived Effectiveness of Leading Safety Indicators in the US Dairy Product Manufacturing Industry

  • Derlyke, Peter Van;Marin, Luz S.;Zreiqat, Majed
    • Safety and Health at Work
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    • v.13 no.3
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    • pp.343-349
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    • 2022
  • Background: In the United States, the dairy product manufacturing industry has consistently had higher rates of work-related nonfatal injuries and illnesses compared to the national average for industries in all sectors. The selection and implementation of appropriate safety performance indicators are important aspect of reducing risk within safety management systems. This study examined the leading safety indicators implemented in the dairy product-manufacturing sector (NAICS 3115) and their perceived effectiveness in reducing work-related injuries. Methods: Perceptions were collected from individuals with safety responsibilities in the dairy product manufacturing facilities. OSHA Incident Rate (OIR) and Days away, restricted and transferred (DART) rates from 2013 to 2018 were analyzed. Results: The perceived most effective leading were safety observations, stop work authority, near miss reporting, safety audits, preventative maintenance, safety inspections, safety training attendance, and job hazard analysis/safety analysis, respectively. The 6-year trend analysis showed that those implementing all eight top indicators had a slightly lower rates than those that did not implement all eight. Production focused mentality, poor training, and lack of management commitment were perceived as the leading causes of injuries in this industry. Conclusion: Collecting leading indicators with the unique interest to meet the regulatory requirements and to document the management system without the actual goal of using them as input to improve the system most probably will not lead to an effective reduction of negative safety outcomes. For leading indicators to be effective, they should be properly selected, executed, periodically evaluated and actions are taken when necessary.

Development of a foaling alarm system using an accelerometer

  • Youngwook, Jung;Honghee, Chang;Minjung, Yoon
    • Journal of Animal Science and Technology
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    • v.64 no.6
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    • pp.1237-1244
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    • 2022
  • Horse breeders suffer massive economic losses due to dystocia, abortion, and stillbirths. In Thoroughbred mares, breeders often miss the foaling process because approximately 86% of the foaling events occur from 19:00 to 7:00; consequently, breeders cannot assist mares experiencing dystocia. To solve this problem, various foaling alarm systems have been developed. However, there is a need to develop a new system to overcome the shortcomings of the existing devices and improve their accuracy. To this end, the present study aimed to (1) develop a novel foaling alarm system and (2) compare its accuracy with that of the existing FoalertTM system. Specifically, eighteen Thoroughbred mares (11.9 ± 4.0 years old) were included. An accelerometer was used to analyze specific foaling behaviors. Behavioral data were transmitted to a data server every second. Depending on the acceleration value, behaviors were automatically classified by the server as categorized behaviors 1 (behaviors without change in body rotation), 2 (behaviors with sudden change in body rotation, such as rolling over), and 3 (behaviors with long-term change in body rotation, such as lying down laterally). The system was designed to alarm when the duration of categorized behaviors 2 and 3 was 12.9% and that of categorized behavior 3 was 1% during 10 min. The system measured the duration of each categorized behavior every 10 min and transmitted an alarm to the breeders when foaling was detected. To confirm its accuracy, the foaling detection time of the novel system was compared with that of FoalertTM. The novel foaling alarm system and FoalertTM alarmed foaling onset respectively 32.6 ± 17.9 and 8.6 ± 1.0 min prior to foal discharge, and the foaling detection rate of both systems was 94.4%. Therefore, the novel foaling alarm system equipped with an accelerometer can precisely detect and alert foaling onset.

Analysis and study of Deep Reinforcement Learning based Resource Allocation for Renewable Powered 5G Ultra-Dense Networks

  • Hamza Ali Alshawabkeh
    • International Journal of Computer Science & Network Security
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    • v.24 no.1
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    • pp.226-234
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    • 2024
  • The frequent handover problem and playing ping-pong effects in 5G (5th Generation) ultra-dense networking cannot be effectively resolved by the conventional handover decision methods, which rely on the handover thresholds and measurement reports. For instance, millimetre-wave LANs, broadband remote association techniques, and 5G/6G organizations are instances of group of people yet to come frameworks that request greater security, lower idleness, and dependable principles and correspondence limit. One of the critical parts of 5G and 6G innovation is believed to be successful blockage the board. With further developed help quality, it empowers administrator to run many systems administration recreations on a solitary association. To guarantee load adjusting, forestall network cut disappointment, and give substitute cuts in case of blockage or cut frustration, a modern pursuing choices framework to deal with showing up network information is require. Our goal is to balance the strain on BSs while optimizing the value of the information that is transferred from satellites to BSs. Nevertheless, due to their irregular flight characteristic, some satellites frequently cannot establish a connection with Base Stations (BSs), which further complicates the joint satellite-BS connection and channel allocation. SF redistribution techniques based on Deep Reinforcement Learning (DRL) have been devised, taking into account the randomness of the data received by the terminal. In order to predict the best capacity improvements in the wireless instruments of 5G and 6G IoT networks, a hybrid algorithm for deep learning is being used in this study. To control the level of congestion within a 5G/6G network, the suggested approach is put into effect to a training set. With 0.933 accuracy and 0.067 miss rate, the suggested method produced encouraging results.

A Study on Improvement of Buffer Cache Performance for File I/O in Deep Learning (딥러닝의 파일 입출력을 위한 버퍼캐시 성능 개선 연구)

  • Jeongha Lee;Hyokyung Bahn
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.24 no.2
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    • pp.93-98
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    • 2024
  • With the rapid advance in AI (artificial intelligence) and high-performance computing technologies, deep learning is being used in various fields. Deep learning proceeds training by randomly reading a large amount of data and repeats this process. A large number of files are randomly repeatedly referenced during deep learning, which shows different access characteristics from traditional workloads with temporal locality. In order to cope with the difficulty in caching caused by deep learning, we propose a new sampling method that aims at reducing the randomness of dataset reading and adaptively operating on existing buffer cache algorithms. We show that the proposed policy reduces the miss rate of the buffer cache by 16% on average and up to 33% compared to the existing method, and improves the execution time by up to 24%.