• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.9
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• pp.904-911
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• 2003

A new method to reduce the size of microwave amplifiers spiral-shaped defected ground structure(Spiral-DGS) is proposed. A microstrip line having Spiral-DGS on the ground plane produces increased slow-wave factor and electrical length for the fixed physical length. In addition, it provides an excellent rejection characteristic for a finite frequency band like band rejection filters. The rejection band is used for rejecting harmonic components of amplifiers. The reduced microstrip line lengths in matching networks by Spiral-DGS are 39 % and 44 % of the original ones in input and output matching networks, respectively. It is shown that the measured S-parameters of the reduced amplifier agree well with those of the original amplifier. The measured second harmonic of the reduced amplifier is much less than that of the original amplifier by at least 10 dB. The same technique is applied to reject the third harmonic using the proper Spiral-DGS for the third harmonic frequency. The measured third harmonic is smaller than that of the original amplifier by 25 dB.

• Proceedings of the KIEE Conference
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• 1987.07b
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• pp.1564-1568
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• 1987

A design methodology for front ends of a Direct Broadcasting satellite (DBS) Receiver for X-band was reported by utilizing Monolithic Microwave Integrated Circuits (MMIC) technology. The frequency converter including a three-stage low-noise amplifier, a image frequency rejection filter, and a mixer and buffer amplifier was designed by a Home-made CAD program. The results of computer simulation using the CAD program showed that overall gain was over 36.63dB, and noise figure below 2.55dB, respectively.

• Electronics and Telecommunications Trends
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• v.29 no.6
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• pp.1-13
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• 2014

GaN(Gallium Nitride)는 3.4eV의 넓은 에너지 갭으로 인하여 고전압에서 동작이 가능하고, 분극전하를 이용한 캐리어 농도가 높아 높은 전류밀도와 전력밀도를 얻을 수 있으며, 높은 전자 이동도와 포화 속도로부터 고속 동작이 가능하여 고주파 고출력 고효율 소형의 전력증폭기 소자의 재료로 적합하다. 본고에서는 민수 및 군수 겸용 Ku-대역 및 Ka-대역 GaN 고출력 전력증폭기(SSPA: Solid-State Power Amplifier)와 관련된 GaN 전력증폭 소자, GaN 전력증폭기 MMIC(Microwave Monolithic Integrated Circuit), 내부정합 패키지형 GaN 전력증폭기 및 GaN SSPA에 대하여, 국내외 특허 기술동향과 연구개발 기술동향을 중심으로 고찰하고자 한다. 국외의 GaN 고주파 고출력 전력증폭기 기술의 연구동향이나 특허동향을 심층분석하여 연구개발에 활용하고자 한다.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.185-188
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• 2001

In this paper, we design and implement high-power amplifier with 18 watt for W-CDMA repeater. We simulate microwave circuits using RF simulator, ADS1.3 and optimize the circuit to obtain the linear and high power using Harmonic balance method. Harmonic balance is an excellent method in the analysis of nonlinear system. The HPA is fabricated on tefron substrate($\varepsilon_{{\gamma}}$=3.48, h=0.5mm, T=0.035mm). From the measured result, the HPA has gain of 52dB, 1 dB compression power of 52.8dBm and good ACPR (Adjacent Channel Power Radio) performance.l Power Radio) performance.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.1
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• pp.51-56
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• 1984

This paper describes the analysis and design of a GaAs FET distributed amplifier connecting a series capacitor to get a super wide bandwidth by reducing the gate line attenuation constant. In this approach a design example with a 300$\mu$ gate length FET devices is presented, and the abtained results are; that without series capacitors the bandwidth is 2-12 GHz, but with capacitors 2-20 GHz in flat gain.

• ETRI Journal
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• v.24 no.3
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• pp.190-196
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• 2002

This paper presents millimeter wave monolithic microwave integrated circuit (MMIC) low noise amplifiers using a $0.15{\mu}m$ commercial pHEMT process. After carefully investigating design considerations for millimeter-wave applications, with emphasis on the active device model and electomagnetic (EM) simulation, we designed two single-ended low noise amplifiers, one for Q-band and one for V-band. The Q-band two stage amplifier showed an average noise figure of 2.2 dB with an 18.3 dB average gain at 44 GHz. The V-band two stage amplifier showed an average noise figure of 2.9 dB with a 14.7 dB average gain at 65 GHz. Our design technique and model demonstrates good agreement between measured and predicted results. Compared with the published data, this work also presents state-of-the-art performance in terms of the gain and noise figure.

• Journal of IKEEE
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• v.13 no.4
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• pp.103-109
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• 2009

We report an efficient jitter reduction technique in an analog fier-optic link employing a Mach-Zehnder modulator followed by an erbium-doped fiber amplifier. By adjusting the modulator-bias to $0.089V_{\pi}$, we could increase the RF gain up to 10.65 dB for 10 GHz RF signal and reduce the random jitter by 46.5%, max, at an input optical power of -0.11 dBm to the EDFA.

• Journal of electromagnetic engineering and science
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• v.14 no.4
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• pp.399-404
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• 2014

A power amplifier (PA) for a femto-cell base station should be highly efficient, linear and small. The efficiency for amplification of a high peak-to-average power ratio (PAPR) signal was improved by designing an asymmetric Doherty PA (DPA). The linearity was improved by applying third-order inter-modulation (IM3) cancellation method. A small size is achieved by designing the DPA using GaN MMIC process. The implemented 2-stage DPA delivers a power-added efficiency (PAE) of 38.6% and a gain of 33.4 dB with an average power of 34.2 dBm for a 7.2 dB PAPR 10 MHz bandwidth LTE signal at 2.14 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.7
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• pp.683-693
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• 2011

In this paper, a design of high current and broad-band microwave bias-tee was presented for a stable bias of a high power amplifier. An input impedance of bias-tee should be shown to 50 ohm with the wideband in order to be stably-biased the amplifier. For this design of the bias-tee, a capacitor of bias-tee for a DC block was designed with a high wide-band admittance by a parallel sum of capacitors, and a inductor for a RF choke and a DC feeding was designed with a high wide-band impedance by a series sum of inductors. As this inductor and capacitor for the sum has each SRF, band-limitation of lumped element was driven from SRF. This limitation was overcome by control of a resonance's quality factor with adding a resistor. 1608 SMD chips for design's element was mounted on the this pattern for the designed bias-tee. The fabricated bias-tee presented 10 dB of return loss and wide-band about 50 ohm input impedance at 10 MHz~10 GHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.9
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• pp.882-888
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• 2002

This paper proposed a bias stability circuit that compensates the degradation of MMIC's performance for the variation of the process and temperature. The proposed bias circuit proved the superior effect compared with the conventional bias circuit using the constant current source. It designed and fabricated simultaneously two amplifier on one layout for comparison in same conditions. One is amplifier with conventional bias circuit using constant current source and the other is amplifier with proposed bias stability circuit. The chip was measured the microwave performances under process variation that classed the level NOM, MIN and MAX. The amplifier with a conventional bias circuit using constant current source has 6.4 dB gain variation and 7 mA Ids variation at 1.8 GHz, but the amplifier with the proposed bias circuit has the 2.1 dB gain variation and 3 mA Ids variation. As the result, MMIC having the proposed bias circuit shows the superior compensation of the quiescent point than the MMIC having the conventional bias circuit under the variations of the process and temperature and can improve the yield of the MMIC. The fabricated chip size is 1.2 mm $\times$ 1.4 mm.