• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 1997년도 춘계학술대회 논문집
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• pp.362-365
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• 1997

In the field of Micro-Mechanics, it has been known diffcult to integrate the micro-machine with sensor and source line for the conventional copper line cnanot be used in compact and small size. We developed a system to make thethin copper film as a connect line on the poyurethane pipe (2mm in diameter) by the evaporation technique. This system consists of an evaporation chamber two long branches, substrate hoider and a Linear-Rotary motion feed feedthrough. The results showed that thin copper film coated polyurethanc pipe could be applied th the small medical devices such as the micro active endoscope.

• 한국정밀공학회지
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• 제16권3호통권96호
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• pp.62-71
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• 1999

Integrating micro-machined sensors and actuators on the conventional devices with the copper power lines was incompatible to fabricate the mass produced micro electromechanical system (MEMS) devices. To achieve the compatibility of the wiring method between MEMS parts and devices, we developed the three-dimensional sputter-evaporation system that coats micropatterned thin copper films on the surface of the MEMS element. The system consists of a process chamber, two branch chambers, the substrate holder, and a linear-rotary motion feedthrough. Thin copper film was sputtered and evaporated on the biocompatible polymer, Pellethane$^{circed{R}}$ and silicone, catheter that is 2 mm in diameter and 700 mm in length. The metal film coating technique with three-dimensional thin film sputter-evaporation system was developed to apply the power and signal lines on the micro active endoscope. In this paper, we developed the three-dimensional metal film sputter-evaporation system operated on the low temperature for the biopolymeric substrates used in the medical MEMS devices.

• 조명전기설비학회논문지
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• 제18권2호
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• pp.90-99
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• 2004

고도 정보화 사회의 발달과 함께 정보통신 설비는 빠른 전송속도를 필요로 하며, 지능형 산업설비와 행정, 금융, 교통시스템과 같은 사회시스템은 집적회로와 초소형 반도체로 구성되므로 원격감시, 조작에 의해 점차적으로 자동화 되어가고 있다. 이와 같은 현대의 초소형 전자회로는 뇌 서지에 의해 흔히 손상을 입을 수 있으며, 뇌 과전압으로부터 전자회로의 보호에 관심이 집중되고 있다. 본 논문은 일반주택에서 뇌 서지로부터 초소형 컴퓨터와 같은 전자기기의 효과적인 보호방법을 제안하기 위하여 전원계통의 접지방식에 따른 서지보호기의 보호효과를 실험적으로 분석하였다. 또한 서지보호기의 효과적인 설치방법을 조사하고 제안하였다. 기존의 설비에 추가적으로 서지보호기를 설치하는 것은 서지보호기까지의 긴 접속선으로 인한 인덕턴스 때문에 높은 잔류전압이 나타난다. 서지보호기의 설치에 있어 두 접속선을 꼬는 방법이 급격하게 상승하는 과도과전압에 매우 효과적이다.

• 마이크로전자및패키징학회지
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• 제24권2호
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• pp.29-35
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• 2017

본 논문에서는 서브 밀리미터 직경의 카테터 표면 위에 금속 마이크로 와이어를 접착하는 공정을 연구하였다. 최근 유연 전자 디바이스 분야는 유연한 평면 폴리머 기판과 그 기판 위의 마이크로 전극 공정이 계속해서 연구되고 있다. 하지만, 의료 분야에서는 카테터와 같이 곡면을 가진 기판이 중요하다. 특히 카테터 중에서도 여러 한계점을 가진 뇌혈관 수술을 개선하기 위한 서브 밀리미터의 직경을 가진 조향 가능한 카테터의 중요성이 대두되고 있다. 이러한 카테터를 구현하기 위해 조향을 위한 엑추에이터들은 연구가 되고 있지만 이를 구동하기 위한 배선 연구는 진행된 바가 없다. 그러므로 본 연구에서는 이러한 서브 밀리미터 카테터 위에 마이크로 금속 와이어를 접착하는 공정을 개발하였다. 적합한 지그를 설계함으로써 마이크로 와이어를 서브 밀리미터 직경의 카테터에 정렬한다. 그리고 자외선 경화 시스템과 상용품을 이용하여 공정 시간 및 공정 비용을 감소시켰다. 상용품으로 골드 마이크로 와이어, 자외선 경화 에폭시, 자외선 램프 그리고 서브 밀리미터 카테터를 이용하였다. 공정 후 카테터는 광학 현미경, 저항 측정기, 만능 시험기를 통해 분석하였다.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2001년도 3rd Korea-Japan Advanced Semiconductor Packaging Technology Seminar
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• pp.183-192
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• 2001

1- Buildup PCB technology is utilized to a bare chip attach substrate technology for packaging of semiconductor chip 2- Requirement for the substrate design rule is described in SIA International Technology Roadmap for Semiconductor. 3- There are seven fabrication methods of build-up technology. 4- Coating and lamination for resin and photo, and laser for micro via hope processes are available. Below $50\mu\textrm{m}$ in diameter is possible. 5- Fine pitch lines down to $30\mu\textrm{m}$ can be achieved by pattern plating with better electrical property. 6- Dielectric loss reduction is a key material improvement item for next generation build-up technology. 7- High band width up to 512 GB/s is possible with current wiring groundrule.

• 한국재료학회지
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• 제11권10호
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• pp.820-832
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• 2001

In order to obtain the basic data on the optimum conditions of electroforming process for fabricating the micro wiring pattern for plate type micro- motor core, characteristics of plating bath and properties of deposits were studied with various copper plating baths which contain sulfate, fluoborate, pyrophosphate and cyanide salt, respectively. Cathodic polarization, throwing power, internal stress, texture and surface morphology of deposits were observed. Throwing power of plating solution is deeply related to the polarization curves and the values are in the range of +20∼20%. The order of values ate as follows- pyrophosphate, cyanide, sulfate and fluoborate bath. Internal stresses of deposits are tensile in all of the copper plating bath. Thickness of the deposits plated at the center of holes has the highest value in the pyrophosphate bath and K factor, ratio of height and width of deposit, is 1.44. It was confirmed that the pyrophosphate bath was the best one for the electroforming of wire pattern.

• 대한기계학회논문집A
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• 제28권10호
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• pp.1598-1602
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• 2004

In this paper, we report a microthermostat using PDMS (poly-dimethylsiloxane) and glass. This PDMS/glass chip is able to maintain constant temperature that is necessary for restriction enzyme reaction. Since PDMS is the low-cost and the mass-producible material and has very good biochemical compatibility, PDMS chip has more benefit than general Si chip. Heater was made of Au wiring patterned on Pyrex glass. A reaction chamber has a capacity of about 3 ${mu}ell$. We performed a restriction enzyme reaction by using the fabricated microthermostat and conventional method. Then, with the electrophoresis, we made a comparison between the result from the micro reactor and the one from conventional method.

• 대한기계학회논문집A
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• 제30권9호
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• pp.1160-1165
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• 2006

In this paper, the 2-dimensional uniaxial force sensors array is introduced to detect the distributed force using fiber Bragg gratings. Uniaxial force transducer was designed to avoid the chirping and micro bending which degrade the performance of the sensor. The Brags wavelength shift of the sensor was estimated using the finite element analysis. Using this uniaxial force sensor, the uniaxial force sensors array $(3{\times}3)$ was fabricated, and the Performance of this sensors array was evaluated. The Presented sensors may has very simple configuration and its wiring is very simple compared with any other force sensors arrays.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2005년도 ISMP
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• pp.67-88
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• 2005

Mold-Flow 3 Die Stack CSP of Mold array packaging with different Gate types. As high density package option such as 3 or 4 die stacking technologies are developed, the major concerning points of mold related qualities such as incomplete mold, exposed wires and wire sweeping issues are increased because of its narrow space between die top and mold surface and higher wiring density. Full 3D rheokinetic simulation of Mold flow for 3 die stacking structure case was done with the rheological parameters acquired from Slit-Die rheometer and DSC of commercial EMC. The center gate showed severe void but corner gate showed relatively better void performance. But in case of wire sweeping related, the center gate type showed less wire sweeping than corner gate types. From the simulation results, corner gate types showed increased velocity, shear stress and mold pressure near the gate and final filling zone. The experimental Case study and the Mold flow simulation showed good agreement on the mold void and wire sweeping related prediction. Full 3D simulation methodologies with proper rheokinetic material characterization by thermal and rheological instruments enable the prediction of micro-scale mold filling behavior in the multi die stacking and other complicated packaging structures for the future application.

• 마이크로전자및패키징학회지
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• 제8권2호
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• pp.37-42
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• 2001

The BGA package has been the area array package of choice for several years. Recently, the transition has been to finer pitch configurations called Chip Scale Packages (CSP). Several of these package types are available at 0.5 mm pitch. requiring surface mount assemblers to evaluate and optimize various elements of the assembly process. This presentation describes the issues associated with making the transition from BGA to CSP assembly. Areas addressed will include the accuracy of pick and place equipment, printed wiring board lines and spaces, PWB vias, in-circuit test issues, solder paste printing, moisture related factors, rework and reliability. The transition to 0.5 mm pitch requires careful evaluation of the board design, solder paste selection, stencil design and component placement accuracy. At this pitch, ball and board pad diameters can be as small as 0.25 mm and 0.20 mm respectively. Drilled interstitial vias are no longer possible and higher ball count packages require micro-via board technology. The transition to CSP requires careful evaluation of these issues. Normal paste registration and BGA component tolerances can no longer achieve the required process levels and higher accuracy pick and place machines need to be implemented. This presentation will examine the optimization of these critical assembly operations, contrast the challenges at 0.5 mm and also look at the continuation of the process to incorporate smaller pitch flip chip devices.