• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.253-253
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• 2012

Low temperature SiOx film process has being required for both silicon and oxide (IGZO) based low temperature thin film transistor (TFT) for application of flexible display. In recent decades, from low density and high pressure such as capacitively coupled plasma (CCP) type plasma enhanced chemical vapor deposition (PECVD) to the high density plasma and low pressure such as inductively coupled plasma (ICP) and electron cyclotron resonance (ECR) have been used to researching to obtain high quality silicon oxide (SiOx) thin film at low temperature. However, these plasma deposition devices have limitation of controllability of process condition because process parameters of plasma deposition such as RF power, working pressure and gas ratio influence each other on plasma conditions which non-leanly influence depositing thin film. In compared to these plasma deposition devices, neutral beam assisted chemical vapor deposition (NBaCVD) has advantage of independence of control parameters. The energy of neutral beam (NB) can be controlled independently of other process conditions. In this manner, we obtained NB dependent high crystallized intrinsic and doped silicon thin film at low temperature in our another papers. We examine the properties of the low temperature processed silicon oxide thin films which are fabricated by the NBaCVD. NBaCVD deposition system consists of the internal inductively coupled plasma (ICP) antenna and the reflector. Internal ICP antenna generates high density plasma and reflector generates NB by auger recombination of ions at the surface of metal reflector. During deposition of silicon oxide thin film by using the NBaCVD process with a tungsten reflector, the energetic Neutral Beam (NB) that controlled by the reflector bias believed to help surface reaction. Electrical and structural properties of the silicon oxide are changed by the reflector bias, effectively. We measured the breakdown field and structure property of the Si oxide thin film by analysis of I-V, C-V and FTIR measurement.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.28 no.4
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• pp.218-221
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• 2015

Power MOSFETs (metal oxide semiconductor field effect transistor) operate as energy control semiconductor switches. In order to reduce energy loss of the device during switch-on state, it is essential to increase its conductance. In this study we have investigated a structure to reduce the on-resistance characteristics of the MOSFET. We have a proposed MOSFET structure of active cells region buried under the gate pad. The measurement are carried out with a EDS to analyze electrical characteristics, and the proposed MOSFET are compared with the conventional MOSFET. The result of proposed MOSFET was 1.68[${\Omega}$], showing 10% improvement compared to the conventional MOSFET at 700[V].

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.32 no.3
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• pp.201-206
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• 2019

This report constitutes the first demonstration in Korea of single-crystal lateral gallium oxide ($Ga_2O_3$) as a metal-oxide-semiconductor field-effect-transistor (MOSFET), with a breakdown voltage in excess of 480 V. A Si-doped channel layer was grown on a Fe-doped semi-insulating ${\beta}-Ga_2O_3$ (010) substrate by molecular beam epitaxy. The single-crystal substrate was grown by the edge-defined film-fed growth method and wafered to a size of $10{\times}15mm^2$. Although we fabricated several types of power devices using the same process, we only report the characterization of a finger-type MOSFET with a gate length ($L_g$) of $2{\mu}m$ and a gate-drain spacing ($L_{gd}$) of $5{\mu}m$. The MOSFET showed a favorable drain current modulation according to the gate voltage swing. A complete drain current pinch-off feature was also obtained for $V_{gs}<-6V$, and the three-terminal off-state breakdown voltage was over 482 V in a $L_{gd}=5{\mu}m$ device measured in Fluorinert ambient at $V_{gs}=-10V$. A low drain leakage current of 4.7 nA at the off-state led to a high on/off drain current ratio of approximately $5.3{\times}10^5$. These device characteristics indicate the promising potential of $Ga_2O_3$-based electrical devices for next-generation high-power device applications, such as electrical autonomous vehicles, railroads, photovoltaics, renewable energy, and industry.

• Transactions on Electrical and Electronic Materials
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• v.16 no.2
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• pp.78-81
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• 2015

Pure ZnO and ZnO nanowires doped with 3 wt.% Ga (‘3GZO’) were grown by pulsed laser deposition in a furnace system. The doping of Ga in ZnO nanowires was analyzed by observing the optical and chemical properties of the doped nanowires. The diameter and length of nanowires were under 200 nm and several ${\mu}m$, respectively. Changes of significant resistance were observed and the sensitivities of ZnO and 3GZO nanowires were compared. The sensitivities of ZnO and 3GZO nanowire sensors measured at 300℃ for 1 ppm of ethanol gas were 97% and 48%, respectively.

• Transactions on Electrical and Electronic Materials
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• v.13 no.2
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• pp.69-72
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• 2012

In this study, deposition of low-dielectric constant SiOC(H) films by conventional plasma-enhanced chemical vapor deposition (PECVD) were investigated through various characterization techniques. The results show that, with an increase in the plasma power density, the relative dielectric constant (k) of the deposited films decreases whereas the refractive index increases. This is mainly due to the incorporation of organic molecules with $CH_3$ group into the Si-O-Si cage structure. It is as confirmed by FT-IR measurements in which the absorption peak at 1,129 $cm^{-1}$ corresponding to Si-O-Si cage structure increases with power plasma density. Electrical characterization reveals that even after fast thermal annealing process, the leakage current density of the deposited films is in the order of $10^{-11}$ A/cm at 1.5 MV/cm. The reliability of the SiOC(H) film is also further characterized by using BTS test.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.3
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• pp.252-258
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• 2013

In this paper, a thermally stable nickel silicide technology using the co-sputtering of nickel and titanium atoms capped with TiN layer is proposed for nano-scale metal oxide semiconductor field effect transistor (MOSFET) applications. The effects of the incorporation of titanium ingredient in the co-sputtered Ni layer are characterized as a function of Ti sputtering power. The difference between the one-step rapid thermal process (RTP) and two-step RTP for the silicidation process has also been studied. It is shown that a certain proportion of titanium incorporation with two-step RTP has the best thermal stability for this structure.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.6
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• pp.647-654
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• 2013

The design and analysis of analog circuit application on CMOS technology are a challenge in deep sub-micrometer process. This paper is a study on the performance value of Double Gate (DG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET) with Gate Stack and the channel engineering Single Halo (SH), Double Halo (DH). Four different structures have been analysed keeping channel length constant. The short channel parameters and different sub-threshold analog figures of merit (FOMs) are analysed. This work extensively provides the device structures which may be applicable for high speed switching and low power consumption application.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.1
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• pp.20-27
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• 2010

Modeling is essential to simulate the operation of integrated circuit (IC) before its fabrication. Seeing a large number of Metal-Oxide-Silicon Field-Effect-Transistor (MOSFET) models available, it has become important to understand them and compare them for their pros and cons. The task becomes equally difficult when the complexity of these models becomes very high. The paper reviews the mainstream models with their physical relevance and their comparisons. Major short-channel and quantum effects in the models are outlined. Emphasis is set upon the latest compact models like BSIM, MOS Models 9/11, EKV, SP etc.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.9
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• pp.667-670
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• 2010

In this paper, a high voltage current sensing circuit for boost converter is designed and verified by Cadence SPECTRE simulations. The current mirror pair, power and sensing metal-oxide semiconductor field effect transistors (MOSFETs) with size ratio of K, is used in our on-chip current sensing circuit. Very low drain voltages of the current mirror pair should be matched to give accurate current sensing, so a folded-cascode opamp with a PMOS input pair is used in our design. A high voltage high side lateral-diffused MOS transistor (LDMOST) switch is used between the current sensing circuit and power MOSFET to protect the current sensing circuit from the high output voltage. Simulation results using 0.35 ${\mu}m$ BCD process show that current sensing is accurate and the pulse frequency modulation (PFM) boost converter using the proposed current sensing circuit satisfies with the specifications.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.1
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• pp.1-7
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• 2013

In this paper, a biosensor based on a gated lateral bipolar junction transistor (BJT) is proposed. The gated lateral BJT can function as both a metal-oxide-semiconductor field-effect transistor (MOSFET) and a BJT. By using the self-assembled monolayer (SAM) method, the C-reactive protein antibodies were immobilized on the floating gate of the device as the sensing membrane. Through the experiments, the characteristics of the biosensor were analyzed in this study. According to the results, it is indicated that the gated lateral BJT device can be successfully applied as a biosensor. Additionally, we found that the sensitivity of the gated lateral BJT can be varied by adjusting the emitter (source) bias.