• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.29-32
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• 2000

Cerium oxide thin film has been proposed as a buffer layer between the ferroelectric film and the Si substrate in Metal-Ferroelectric-Insulator-Silicon (MFIS ) structures for ferroelectric random access memory (FRAM) applications. In this study, CeO$_2$ thin films were etched with Cl$_2$/Ar gas combination in an inductively coupled plasma (ICP). The highest etch rate of CeO$_2$ film is 230 $\AA$/min at Cl$_2$/(Cl$_2$+Ar) gas mixing ratio of 0.2. This result confirms that CeO$_2$ thin film is dominantly etched by Ar ions bombardment and is assisted by chemical reaction of Cl radicals. The selectivity of CeO$_2$ to YMnO$_3$ was 1.83. As a XPS analysis, the surface of etched CeO$_2$ thin films was existed in Ce-Cl bond by chemical reaction between Ce and Cl. The results of XPS analysis were confirmed by SIMS analysis. The existence of Ce-Cl bonding was proven at 176.15 (a.m.u.).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.21-24
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• 2000

Ferroelectric YMnO$_3$ thin films are excellent dielectric materials for high integrated ferroelectric random access memory (FRAM) with metal-ferroelectric-silicon field effect transistor (MFSFET) structure. In this study, YMnO$_3$ thin films were etched with C1$_2$/Ar gas chemistries in inductively coupled plasma (ICP). The maximum etch rate of YMnO$_3$ thin films is 285 $\AA$/min under C1$_2$/Ar of 10/0, 600 W/-200 V and 15 mTorr. The selectivities of YMnO$_3$ over CeO$_2$ and $Y_2$O$_3$ are 2.85, 1.72, respectively. The results of x-ray photoelectron spectroscopy (XPS) reflect that Y is removed dominantly by chemical reaction between Y and Cl, while Mn is removed more effective by Ar ion bombardment than chemical reaction. The results of secondary ion mass spectrometer (SIMS) were equal to these of XPS. The etch profile of the etched YMnO$_3$ film is approximately 65$^{\circ}$and free of residues at the sidewall.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.18-19
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• 2017

This paper shows the design of the high voltage capacitor charger which using a modified series parallel resonant converter. The used silicon carbide Metal-Oxide Semiconductor Field Effect Transistor (SiC MOSFET) is proper for the few hundred kHz of high switching frequency to overcome the bulk resonant inductor and snubber capacitors. Furthermore, to increase the amount of the charging current, three phase delta transformer is used as well as the secondary sides are connected in parallel. In this paper, the design procedure of the high voltage capacitor charger is suggested and the output power is verified by the experimental results with the rated resistor load.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05c
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• pp.149-153
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• 2003

Chemical mechanical polishing (CMP) technology for global planarization of multi-level inter-connection structure has been widely studied for the next generation devices. CMP process has been paid attention to planarized pre-metal dielectric (PMD), inter-layer dielectric (ILD) interconnections. Expecially, shallow trench isolation (STI) used to CMP process on essential. Recently, the direct STI-CMP process without the conventional complex reverse moat etch process has established by using slurry additive with the high selectivity between $SiO_2$ and $Si_3N_4$ films for the purpose of process simplification and n-situ end point detection(EPD). However, STI-CMP process has various defects such as nitride residue, tom oxide and damage of silicon active region. To solve these problems, in this paper, we studied the planarization characteristics using a high selectivity slurry(HSS). As our experimental results, it was possible to achieve a global planarization and STI-CMP process could be dramatically simplified. Also we estimated the reliability through the repeated tests with the optimized process conditions in order to identify the reproducibility of HSS STI-CMP process.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.8
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• pp.479-483
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• 2017

The effect of $NH_3$ plasma treatment on device characteristics was confirmed for an optimized thin film transistor of poly-Si formed by ELA. When C-V curve was checked for MIS (metal-insulator-silicon), Dit of $NH_3$ plasma treated and MIS was $2.7{\times}10^{10}cm^{-2}eV^{-1}$. Also in the TFT device case, it was decreased to the sub-threshold slope of 0.5 V/decade, 1.9 V of threshold voltage and improved in $26cm^2V^{-1}S^{-1}$ of mobility. Si-N and Si-H bonding reduced dangling bonding to each interface. When gate bias stress was applied, the threshold voltage's shift value of $NH_3$ plasma treated device was 0.58 V for 1,000s, 1.14 V for 3,600s, 1.12 V for 7,200s. As we observe from this quality, electrical stability was also improved and $NH_3$ plasma treatment was considered effective for passivation.

• Transactions of the Korean Society of Automotive Engineers
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• v.23 no.6
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• pp.656-662
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• 2015

In the present study, multi-layered Si DLC (Silicon Diamond-Like Carbon) coatings with HMDSO (Hexamethyldisiloxane) buffer layers are applied on SKD 11 substrates by PECVD (Plasma Enhanced Chemical Vapor Deposition) with different HMDSO gas flow rates, while the gas flow rate of $C_2H_2$ is fixed to enhance the electric resistivity of forming dies for electrically assisted forming. The HMDSO buffer layer is introduced to increase adhesion between the base metal and Si-DLC layers. The result of evaluation of electric resistivity and adhesion strength shows that the properties are affected by the flow rate of HMDSO, while the flow rate of 80 sccm results in the coating with the highest electric resistivity and adhesion strength among the selected flow rates.

• Journal of Korea Foundry Society
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• v.17 no.4
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• pp.371-378
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• 1997

The study for direct synthesis of TaC carbide which was a reaction product of tantalum and carbon in the cast iron was performed. Cast iron which has hypo-eutectic composition was cast bonded in the metal mold with tantalum thin sheet of thickness of $100{\mu}m$. The contents of carbon and silicon of cast iron matrix was controlled to have constant carbon equivalent of 3.6. The chracteristics of microstructure and the formation mechanism of TaC carbide in the interfacial reaction layer in the cast iron/tantalum thin sheet heat treated isothermally at $950^{\circ}C$ for various time were examined. TaC carbide reaction layer was grown to the dendritic morphology in the cast iron/tantalum thin sheet interface by the isothermal heat treatment. The composition of TaC carbide was 48.5 at.% $Ti{\sim}48.6$ at.% C-2.8 at.% Fe. The hardness of reaction layer was MHV $1100{\sim}1200$. The thickness of reaction layer linearly increased with increasing the total content of carbon in the cast iron matrix and isothermal heat treating time. The growth constant for TaC reaction layer was proportional to the log[C] of the matrix. The formation mechanism of TaC reaction layer at the interface of cast iron/tantalum thin sheet was proved to be the interfacial reaction.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.1274-1276
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• 1993

The silicon-nitride films formed by laser CVD method are used for passivating GaAs surfaces. The electrical Properties of metal-insulator-GaAs structure are studied to determined the interfacial characteristics by C-V curves and deep level transient spectroscopy(DLTS). The SiN films are photolysisly deposited from $SiH_4\;and\;NH_3$ in the range of $100^{\circ}C-300^{\circ}C$ on P type, (100) GaAs. The hysteresis is reduced and interface trap density is lowered to $10^{12}-10^{13}$ at $100^{\circ}C-200^{\circ}C$. The surface leakage current is studied too. The passivated GaAs have a little leakage current compared to non passivated GaAs.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2005.09a
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• pp.193-197
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• 2005

This paper presents a method by which multiple holes of ultra small size can be punched simultaneously. Silicon wafers were used to fabricate punching die. Workpiece used in the present investigation were the rolled pure copper of $3{\mu}m$ in thickness and CP titanium of $1.5{\mu}m$ in thickness. The metal foils were punched with the dies and arrays of circular and rectangular holes were made. The diameter of holes ranges from $2-10{\mu}m$. The process set-up is similar to that of the flexible rubber pad forming or Guerin process. Arrays of holes were punched successfully in one step forming. The punched holes were examined in terms of their dimensions, surface qualities, and potential defect. The effects of the die hole dimension on ultra small size hole formation of the thin foil were discussed. The optimum process condition such as proper die shape and diameter-thickness ratio (d/t) were also discussed. The results in this paper show that the present method can be successfully applied to the fabrication of ultra small size hole array in a one step operation.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.190-190
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• 2010

Zinc oxide is the most attractive material due to the large direct band gap (3.37 eV), excellent chemical and thermal stability, and large exciton binding energy (60 meV). Recently, ZnO nanorods were used as the high efficient antireflection coating layer of solar cells based on silicon (Si). In this reports, we studied the effects of rapid thermal annealing (RTA) treatment on optical properties of ZnO nanorods. For fabrication of ZnO nanorods, there are many methods such as hydrothermal method, sol-gel method, and metal organic chemical vapor deposition method. Among of them, we used the conventional wet chemical method which is simple and low temperature growth. In order to synthesize the ZnO nanorods, the ZnO films were deposited on Si substrate by RF magnetron sputtering at room temperature and the samples were dipped to aqua solution containing the zinc nitrate and hexamethylentetramines (HMT). The synthesis process was achieved in keeping with temperature of $90-95^{\circ}C$ and under constant stirring. The morphology of ZnO nanorods on glass and Si was characterized by scanning electron microscopy. For the analysis of antireflection performance, the reflectance and transmittance were measured by spectrophotometer. And for analyzing the effects of RTA treatment on ZnO nanorods, crystalline properties were investigated by X-ray diffraction measurements and optical properties was estimated by photoluminescence spectra.