• Title/Summary/Keyword: Metal gate/High-k

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Progress in Novel Oxides for Gate Dielectrics and Surface Passivation of GaN/AlGaN Heterostructure Field Effect Transistors

  • Abernathy, C.R.;Gila, B.P.;Onstine, A.H.;Pearton, S.J.;Kim, Ji-Hyun;Luo, B.;Mehandru, R.;Ren, F.;Gillespie, J.K.;Fitch, R.C.;Seweel, J.;Dettmer, R.;Via, G.D.;Crespo, A.;Jenkins, T.J.;Irokawa, Y.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.3 no.1
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    • pp.13-20
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    • 2003
  • Both MgO and $Sc_2O_3$ are shown to provide low interface state densities (in the $10^{11}{\;}eV^{-1}{\;}cm{\;}^{-2}$ range)on n-and p-GaN, making them useful for gate dielectrics for metal-oxide semiconductor(MOS) devices and also as surface passivation layers to mitigate current collapse in GaN/AlGaN high electron mobility transistors(HEMTs).Clear evidence of inversion has been demonstrated in gate-controlled MOS p-GaN diodes using both types of oxide. Charge pumping measurements on diodes undergoing a high temperature implant activation anneal show a total surface state density of $~3{\;}{\times}{\;}10^{12}{\;}cm^{-2}$. On HEMT structures, both oxides provide effective passivation of surface states and these devices show improved output power. The MgO/GaN structures are also found to be quite radiation-resistant, making them attractive for satellite and terrestrial communication systems requiring a high tolerance to high energy(40MeV) protons.

Metal work function dependent photoresponse of schottky barrier metal-oxide-field effect transistors(SB MOSFETs) (금속(Al, Cr, Ni)의 일함수를 고려한 쇼트키 장벽 트랜지스터의 전기-광학적 특성)

  • Jung, Ji-Chul;Koo, Sang-Mo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.355-355
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    • 2010
  • We studied the dependence of the performance of schottky barrier metal-oxide-field effect transistors(SB MOSFETs) on the work function of source/drain metals. A strong impact of the various work functions and the light wavelengths on the transistor characteristics is found and explained using experimental data. We used an insulator of a high thickness (100nm) and back gate issues in SOI substrate, subthreshold swing was measured to 300~400[mV/dec] comparing with a ideal subthreshold swing of 60[mV/dec]. Excellent characteristics of Al/Si was demonstrated higher on/off current ratios of ${\sim}10^7$ than others. In addition, extensive photoresponse analysis has been performed using halogen and deuterium light sources(200<$\lambda$<2000nm).

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Hafnium Oxide Layer Based Metal-Oxide-Semiconductor (MOS) Capacitors with Annealing Temperature Variation

  • Lee, Na-Yeong;Choe, Byeong-Deok
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.318.1-318.1
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    • 2016
  • Hafnium Oxide (HfOx) has been attracted as a promising gate dielectric for replacing SiO2 in gate stack applications. In this paper, Metal-Oxide-Semiconductor (MOS) capacitor with solution processed HfO2 high-k material as a dielectric were fabricated. The solvent using $HfOCl2{\cdot}8H2O$ dissolve in 2-Methoxy ethanol was prepared at 0.3M. The HfOx layers were deposited on p-type silicon substrate by spin-coating at $250^{\circ}C$ for 5 minutes on a hot plate and repeated the same cycle for 5 times, followed by annealing process at 350, 450 and $550^{\circ}C$ for 2 hours. When the annealing temperature was increased from 350 to $550^{\circ}C$, capacitance value was increased from 337 to 367 pF. That was resulted from the higher temperature of HfOx which have more crystallization phase, therefore dielectric constant (k) was increased from 11 to 12. It leads to the formation of dense HfOx film and improve the ability of the insulator layer. We confirm that HfOx layer have a good performance for dielectric layer in MOS capacitors.

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Fabrication of Triode Type Field Emission Device Using Carbon Nanotubes Synthesized by Thermal Chemical Vapor Deposition (열 화학 기상 증착법을 이용한 삼극관 구조의 탄소 나노 튜브 전계 방출 소자의 제조)

  • Yu W. J.;Cho Y. S.;Choi G. S.;Kim D. J.
    • Korean Journal of Materials Research
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    • v.14 no.8
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    • pp.542-546
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    • 2004
  • We report a new fabrication process for high performance triode type CNT field emitters and their superior electrical properties. The CNT-based triode-type field emitter structure was fabricated by the conventional semiconductor processes. The keys of the fabrication process are spin-on-glass coating and trim-and-leveling of the carbon nanotubes grown in trench structures by employing a chemical mechanical polishing process. They lead to strong adhesion and a uniform distance from the carbon nanotube tips to the electrode. The measured emission property of the arrays showed a remarkably uniform and high current density. The gate leakage current could be remarkably reduced by coating of thin $SiO_{2}$ insulating layer over the gate metal. The field enhancement factor(${\beta}$) and emission area(${\alpha}$) were calculated from the F-N plot. This process can be applicable to fabrication of high power CNT vacuum transistors with good electrical performance.

Tunneling Properties in High-k Insulators with Engineered Tunnel Barrier for Nonvolatile Memory (차세대 비휘발성 메모리에 사용되는 High-k 절연막의 터널링 특성)

  • Oh, Se-Man;Jung, Myung-Ho;Park, Gun-Ho;Kim, Kwan-Su;Chung, Hong-Bay;Lee, Young-Hie;Cho, Won-Ju
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.6
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    • pp.466-468
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    • 2009
  • The metal-insulator-silicon (MIS) capacitors with $SiO_2$ and high-k dielectrics ($HfO_2$, $Al_2O_3$) were fabricated, and the current-voltage characteristics were investigated. Especially, an effective barrier height between metal gate and dielectric was extracted by using Fowler-Nordheim (FN) plot and Direct Tunneling (DT) plot of quantum mechanical(QM) modeling. The calculated barrier heights of thermal $SiO_2$, ALD $SiO_2$, $HfO_2$ and $Al_2O_3$ are 3.35 eV, 0.6 eV, 1.75 eV, and 2.65 eV, respectively. Therefore, the performance of non-volatile memory devices can be improved by using engineered tunnel barrier which is considered effective barrier height of high-k materials.

Correlation between Physical Defects and Performance in AlGaN/GaN High Electron Mobility Transistor Devices

  • Park, Seong-Yong;Lee, Tae-Hun;Kim, Moon-J.
    • Transactions on Electrical and Electronic Materials
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    • v.11 no.2
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    • pp.49-53
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    • 2010
  • Microstructural origins of leakage current and physical degradation during operation in product-quality AlGaN/GaN high electron mobility transistor (HEMT) devices were investigated using photon emission microscopy (PEM) and transmission electron microscopy (TEM). AlGaN/GaN HEMTs were fabricated with metal organic chemical vapor deposition on semi-insulating SiC substrates. Photon emission irregularity, which is indicative of gate leakage current, was measured by PEM. Site specific TEM analysis assisted by a focused ion beam revealed the presence of threading dislocations in the channel below the gate at the position showing strong photon emissions. Observation of electrically degraded devices after life tests revealed crack/pit shaped defects next to the drain in the top AlGaN layer. The morphology of the defects was three-dimensionally investigated via electron tomography.

High Speed, High Resolution CMOS Sample and Hold Circuit (고속, 고해상도 CMOS 샘플 앤 홀드 회로)

  • Kim Won-Youn;Park Kong-Soon;Park Sang-Wook;Yoon Kwang-Sub
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.545-548
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    • 2004
  • The paper describes the design of high-speed, high-resolution Sample-and-Hold circuit which shows the conversion rate 80MHz and the power supply of 3.3v with 0.35um CMOS 2-poly 4-metal process for high-speed, high resolution Analog-to-Digital Converter. For improving Dynamic performance of Sample-and-Hold, Two Double bootstrap switch and high performance operational amplifier with gain booster, which are used. and For physical stability of Sample and Hold circuit, reduces excess voltage of gate in bootstrap switch. Simulation results using HSPICE shows the SFDR of 71dB, 75dB in conversion rate of 80MHz result for two inputs(0.5Vpp, 10MHz and 1Vpp, 10MHz) and the power dissipation of 48mW at single 3.3V supply voltage.

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Low-Frequency Noise Characteristics of SiGe pMOSFET Depending upon Channel Structures and Bias Conditions (SiGe pMOSFET의 채널구조와 바이어스 조건에 따른 잡음 특성)

  • Choi, Sang-Sik;Yang, Hun-Duk;Kim, Sang-Hoon;Song, Young-Joo;Cho, Kyoung-Ik;Kim, Jeonng-Huoon;Song, Jong-In;Shim, Kyu-Hwan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.5-6
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    • 2005
  • High performance SiGe heterostructure metal-oxide-semiconductor field effect transistors(MOSFETs) were fabricated using well-controlled delta-doping of boron and SiGe/Si heterostructure epitaxal layers grown by reduced pressure chemical vapor deposition. In this paper, we report 1/f noise characteristics of the SiGe MOSFETs measured under various bias conditions of the gate and drain voltages changing in linear operation regions. From the noise spectral density, we found that the gate and drain voltage dependence of the noise represented same features, as usually scaled with $f^1$. However, 1/f noise was found to be much lower in the device with boron delta-doped layer, by a factor of $10^{-1}\sim10^{-2}$ in comparion with the device fabricated without delta-doped layer. 1/f noise property of delta-doped device looks important because the device may replace bipolar transistors most commonly embedded in high-frequency oscillator circuits.

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Erasing characteristic improvement in SONOS type with engineered tunnel barrier (Engineered tunnel barrier를 갖는 SONOS 소자에서의 소거 속도 향상)

  • Park, Goon-Ho;You, Hee-Wook;Oh, Se-Man;Kim, Min-Soo;Jung, Jong-Wan;Lee, Young-Hie;Chung, Hong-Bay;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.97-98
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    • 2009
  • Tunneling barrier engineered charge trap flash (TBE-CTF) memory capacitor were fabricated using the tunneling barrier engineering technique. Variable oxide thickness (VARIOT) barrier and CRESTED barrier consisting of thin $SiO_2$ and $Si_3N_4$ dielectrics layers were used as engineered tunneling barrier. The charge trapping characteristic with different metal gates are also investigated. A larger memory window was achieved from the TBE-CTF memory with high workfunction metal gate.

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Metal Oxide Thin Film Transistor with Porous Silver Nanowire Top Gate Electrode for Label-Free Bio-Relevant Molecules Detection

  • Yu, Tae-Hui;Kim, Jeong-Hyeok;Sang, Byeong-In;Choe, Won-Guk;Hwang, Do-Gyeong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.268-268
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    • 2016
  • Chemical sensors have attracted much attention due to their various applications such as agriculture product, cosmetic and pharmaceutical components and clinical control. A conventional chemical and biological sensor is consists of fluorescent dye, optical light sources, and photodetector to quantify the extent of concentration. Such complicated system leads to rising cost and slow response time. Until now, the most contemporary thin film transistors (TFTs) are used in the field of flat panel display technology for switching device. Some papers have reported that an interesting alternative to flat panel display technology is chemical sensor technology. Recent advances in chemical detection study for using TFTs, benefits from overwhelming progress made in organic thin film transistors (OTFTs) electronic, have been studied alternative to current optical detection system. However numerous problems still remain especially the long-term stability and lack of reliability. On the other hand, the utilization of metal oxide transistor technology in chemical sensors is substantially promising owing to many advantages such as outstanding electrical performance, flexible device, and transparency. The top-gate structure transistor indicated long-term atmosphere stability and reliability because insulator layer is deposited on the top of semiconductor layer, as an effective mechanical and chemical protection. We report on the fabrication of InGaZnO TFTs with silver nanowire as the top gate electrode for the aim of chemical materials detection by monitoring change of electrical properties. We demonstrated that the improved sensitivity characteristics are related to the employment of a unique combination of nano materials. The silver nanowire top-gate InGaZnO TFTs used in this study features the following advantages: i) high sensitivity, ii) long-term stability in atmosphere and buffer solution iii) no necessary additional electrode and iv) simple fabrication process by spray.

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