• Journal of Information Technology Applications and Management
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• 제13권4호
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• pp.257-271
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• 2006

Recently, flash memories are one of best media to support portable computer's storages in mobile computing environment. The features of non-volatility, low power consumption, and fast access time for read operations are sufficient grounds to support flash memory as major database storage components of portable computers. However, we need to improve traditional Indexing scheme such as B-Tree due to the relatively slow characteristics of flash operation as compared to RAM memory. In order to achieve this goal, we devise a new indexing scheme called F-Tree. F-Tree improves tree operation performance by compressing pointers and keys in tree nodes and rewriting the nodes without a slow erase operation in node insert/delete processes. Based on the results of the performance evaluation, we conclude that F-Tree indexing scheme outperforms the traditional indexing scheme.

• International journal of advanced smart convergence
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• 제12권1호
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• pp.70-75
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• 2023

With the recent proliferation of memory-intensive workloads such as deep learning, analyzing memory access characteristics for efficient memory management is becoming increasingly important. Since read and write operations in memory access have different characteristics, an efficient memory management policy should take into accountthe characteristics of thesetwo operationsseparately. Although some previous studies have considered the different characteristics of reads and writes, they require a modified hardware architecture supporting read bits and write bits. Unlike previous approaches, we propose a software-based management policy under the existing memory architecture for considering read/write characteristics. The proposed policy logically partitions memory space into the read/write area and the write area by making use of reference bits and dirty bits provided in modern paging systems. Simulation experiments with memory access traces show that our approach performs better than the CLOCK algorithm by 23% on average, and the effect is similar to the previous policy with hardware support.

• 한국인터넷방송통신학회논문지
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• 제23권1호
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• pp.71-76
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• 2023

최근 메모리 관리의 효율성을 높이기 위해 읽기 참조와 쓰기 참조의 기록을 별도로 활용하는 전략이 주목받고 있다. 이는 읽기/쓰기 시간이 비대칭적인 저장 매체의 출현과 읽기/쓰기 참조의 소프트웨어적 특성이 상이한 점을 반영하기 위해 필요한 전략이다. 한편, 기존의 연구들은 메모리 페이지에 읽기와 쓰기 중 어떤 참조가 발생했는지 운영체제가 구분할 수 있다는 가정을 하고 있으나, 대부분의 메모리 아키텍처는 이들을 구분할 수 있는 방안을 지원하지 않는다. 본 논문에서는 기존 연구와 달리 소프트웨어적인 방법으로 메모리 페이지에 발생하는 읽기 쓰기 참조의 특성을 반영하는 방법을 제안한다. 제안하는 방법은 참조 비트와 수정 비트를 이용해 각 페이지의 읽기 및 쓰기 기록을 추정하며, 시뮬레이션을 통해 하드웨어적인 지원이 있는 기존 연구와 거의 유사한 효과가 있음을 보인다.

• 한국콘텐츠학회논문지
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• 제10권6호
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• pp.80-90
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• 2010

본 논문에서는 홈 네트워크 환경에서 서비스 이동성을 지원하기 위한 에이전트 구현 방안을 제안한다. 에이전트 구현을 위해 단말 에이전트와 서버 에이전트의 설계 방안을 서술하였다. 구체적으로 단말 에이전트의 사용자 인식 모듈, 시그널링 메시지 수신 및 파싱 모듈과 서버 에이전트의 시그널링 메시지 수신 및 파싱 모듈, 멀티미디어 스위칭 모듈, 메모리 관리 모듈에 대한 설계 방안을 서술하였다. 또한 사용자의 위치 관리를 위해 IP 공유기에서 관리되어야 할 파라메터를 정의하였고 이 파라메터들이 메모리에 저장될 바인딩 테이블의 구조를 설계하였다. 성능 분석을 위해서 M/M/1/K 큐잉 모델을 이용하여 메모리 크기, 차단 확률, 활용도 간의 관계를 도출하였다. 얻어진 결과로부터 서버에이전트가 탑재되는 IP 공유기에서 요구되는 메모리의 크기를 예측할 수 있음을 보였다.

• 한국멀티미디어학회논문지
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• 제24권7호
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• pp.922-932
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• 2021

This thesis mainly studies the impact of short-term memory in VR tour games on users. The thesis is based on VR tour games and short-term memory, using the literature research method, the practical research method, and the investigation method. First, the author designs and makes VR tour games on the Beijing-Hangzhou Grand Canal, and then conducts a questionnaire survey and designs a control experiment. The experiment explores the differences of the short-term memory level of individuals between the normal environment and the VR tour game environment. It verifies whether the influential hypothesis proposed by the research is correct. Research conclusions show that: VR tour games have an impact on short-term memory. Compared with the normal environment, the subjects have better performance in the VR tour game mode and can maintain a high short-term memory level for a longer time. Its conclusions should promote the cultural propaganda of scenic spots and provide theoretical support for tourists' short-term memory of scenic spots culture.

• 충청수학회지
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• 제34권2호
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• pp.157-168
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• 2021

This study uses the benchmark interest rate of the Federal Open Market Committee (FOMC) to predict gold futures prices. For the predictions, we used the support vector machine (SVM) (a machine-learning model) and the long short-term memory (LSTM) deep-learning model. We found that the LSTM method is more accurate than the SVM method. Moreover, we applied the Boruta algorithm to demonstrate that the FOMC benchmark interest rates correlate with gold futures.

• 한국통신학회논문지
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• 제21권1호
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• pp.224-240
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• 1996

It is common sense for at least one or more levels of cache memory to be used in these day's computer systems. In this paper, the impact of the internal cache memory organization on the performance of the computer is investigated by using a simulator program, which is wirtten by authors and run on SUN SPARC workstation, with several real execution, with several real execution trace files. 280 cache organizations have been simulated using n-way set associative mapping and LRU(Least Recently Used) replacement algorithm with write allocation policy. As a result, 16-way setassociative cache is the best configuration, and when we select 256KB cache memory and 64 byte line size, the bus traffic ratio was decreased compared to that of the noncache system so that a single bus could support almost 7 processors without any delay and degradationof high ratio(hit ratio was 99.21%). The smaller the line size we choose, the little lower hit ratio we can get, but the more processors can be supported by a single bus(maximum 18 processors). Therefore, using a proper cache memory organization can make a single bus structure be able to support multiple processors without any performance degradation.

• 대한불안의학회지
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• 제8권1호
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• pp.3-8
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• 2012

Patients with panic disoder (PD) show recollection of their first panic attack, which resembles a trauma that is perceived as an unexpected frightening and subjectively life-threatening event. Information-processing models suggest that anxiety disorders may be characterized by a memory bias for threat-related information. This paper reviews the previous researches that investigated the implicit and/or explicit biases in patients with panic disorder. Among the 17 studies, which addressed the explicit memory bias in PD patients, 11 (64.7%) were found to be explicit memory bias in PD patients. In regards to the implicit memory bias, 4 out of 9 studies (44.4%) were found to support the memory bias. The result shows that evidence of explicit memory bias in PD patients was supported by a number of previous researches. However, evidence of implicit memory bias seems less robust, thus, needs further research for replication. Also, development of new paradigms and applications of various methods will be needed in further researches on memory bias in PD patients.

• Journal of Information Technology Applications and Management
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• 제12권4호
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• pp.59-70
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• 2005

Flash memories are one of best media to support portable computer's storages in mobile computing environment. The features of non-volatility, low power consumption, and fast access time for read operations are sufficient grounds to support flash memory as major database storage components of portable computers. However, we need to improve traditional transaction management scheme due to the relatively slow characteristics of flash operation as compared to RAM memory. in order to achieve this goal, we devise a new scheme called Flash Two Phase Locking (F2PL) scheme for efficient transaction processing. F2Pl improves transaction performance by allowing multi version reads and efficiently handling slow flash write/erase operation in lock management process. We also propose a simulation model to show the performance of F2PL. Based on the results of the performance evaluation, we conclude that F2PL scheme outperforms the traditional scheme.

• 정보기술과데이타베이스저널
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• 제8권2호
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• pp.103-114
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• 2001

In this paper, we propose an efficient index mechanism for real-time main memory database systems. Existing main memory index structures based on the tree can effectively support range searches. However, it doesn't guarantee the real-time characteristic because difference between the access time of a node and an average access time can be high. The index structures based on the hash have always a regular random access time on the simple searches and that speed is very fast. However they do not support range searches. To solve such problems, we propose a new index mechanism called Hyper Tree-Hash (Hyper-TH) that combines ECBH (Extendible Chained Bucket Hashing) and T＊-tree. ECBH can be dynamically extended and has a very fast access time. T＊-tree effectively supports the range searches. We show through our experiments that the proposed mechanism outperforms existing other index structures.