• Journal of Computing Science and Engineering
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• 제5권3호
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• pp.161-166
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• 2011

We present a fast algorithm for Korean text extraction and segmentation from subway signboards using smart phone sensors in order to minimize computational time and memory usage. The algorithm can be used as preprocessing steps for optical character recognition (OCR): binarization, text location, and segmentation. An image of a signboard captured by smart phone camera while holding smart phone by an arbitrary angle is rotated by the detected angle, as if the image was taken by holding a smart phone horizontally. Binarization is only performed once on the subset of connected components instead of the whole image area, resulting in a large reduction in computational time. Text location is guided by user's marker-line placed over the region of interest in binarized image via smart phone touch screen. Then, text segmentation utilizes the data of connected components received in the binarization step, and cuts the string into individual images for designated characters. The resulting data could be used as OCR input, hence solving the most difficult part of OCR on text area included in natural scene images. The experimental results showed that the binarization algorithm of our method is 3.5 and 3.7 times faster than Niblack and Sauvola adaptive-thresholding algorithms, respectively. In addition, our method achieved better quality than other methods.

• 한국정보처리학회논문지
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• 제6권4호
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• pp.988-998
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• 1999

본 논문에서는 LVQ(Learning vector Quantization)을 이용하여 퍼지 규칙의 수를 줄이는 방안을 제안하였다. 훈련 패턴이 많이지면 퍼지 규칙 수가 증가하게 되어 많은 기억용량과 많은 분류시간이 요구된다. 따라서 이러한 문제를 해결하기 위해서는 퍼지규칙의 수를 줄일 수 있는 방법이 강구되어야 한다. 그러나, 퍼지 규칙의 수가 줄어듦으로써 발생하는 성능의 하락을 최소화하기 위하여 양질의 초기 참조 패턴으로 훈련 한 후에, 퍼지 규칙을 생성한다. 시뮬레이션을 통해서 제안된 방법이 매우 효과적임을 알 수 있었다.

• 한국통신학회논문지
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• 제36권9B호
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• pp.1082-1091
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• 2011

DVFS (Dynamic Voltage and Frequency Scaling) 에 기초한 저전력 기법은 배터리를 사용하는 모바일 장치에서 동작시간 향상을 위하여 매우 중요하다. 본 연구에서는 DVFS기법에 기반을 둔 영상디코더의 에너지 소비를 최소화핸 스케줄링 알고리즘을 제안 한다 특히, 기존연구에서 간과된 디코더와 디스플레이 사이에 위치한 버퍼의 크기 제약을 모델에 포함하여 버퍼 넘침을 방지 하도록하며, 이 모델에서 수학적으로 에너지를 최소화하는 알고리즘을 제안하고 증명하였다. 실제 영상을 통한 시뮬레이션 결과 버퍼의 크기가 10 프레임정도에서 이득이 포화상태가 되며, 제안된 알고리즘이 기존의 직관적인 알고리즘들에 비하여 평균 10% 정도의 전력소모 절약을 얻을 수 있음을 확인하였다.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2005년도 ICCAS
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• pp.1260-1263
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• 2005

Data storage related with writing and retrieving requires high storage capacity, fast transfer rate and less access time. Today any data storage system cannot satisfy these conditions, however holographic data storage system can perform faster data transfer rate because it is a page oriented memory system using volume hologram in writing and retrieving data. System can be constructed without mechanical actuating part therefore fast data transfer rate and high storage capacity about 1Tb/cm3 can be realized. In this research, to reduce errors of binary data stored in holographic data storage system, a new method for bit error reduction is suggested. First, find fuzzy rule using experimental system for Element of Holographic Digital Data System. Second, make fuzzy rule table using Genetic algorithm. Third, reduce prior error element and recording Digital Data. Recording ratio and reconstruction ratio will be very good performance

• 한국자기학회지
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• 제1권2호
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• pp.79-84
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• 1991

개 영역 교류자장 문제 해석을 위해 구부범함수를 사용한 변분법을 제시한다. 이 방법에 사용되는 국부범함수는 유한요소영역에 대한 영역적 분항과 유한요소영역과 무한요소영역 사이의 공유 경계면에 대한 경계적분항의 합으로써 이루어 진다. 경계적분항은 무한 계산영역에 대한 범함수의 무 한요소영역에 대한 영역적분항을 고유경계면에 대한 경계적분으로 치환시킴으로써 얻어진다. 본 논문 에서 제시한 방법을 이론해를 알고 있는 모델에 적요시켜 수치해석 결과를 얻고 그 결과를 이론해와 비교하여 보았다. 본 방법을 사용함으로써 이론해와 잘 일치하는 수치해석 결과를 덩었으며, 그리고 개 영역 교류자장 문제해석에 있어서 계산영역을 축소시킬 수 있기 때문에 컴퓨터 기억용량 감소 및 계산시간을 대폭 단축 시킬 수 있을 것이다.

• 대한임베디드공학회논문지
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• 제1권2호
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• pp.90-103
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• 2006

There are many file systems in various operating systems. Those are usually designed for server environments, where the common cases are usually 'multiple active users', 'great many small files' And they assume a big main memory to be used as buffer cache. So the existing file systems are not suitable for resource hungry embedded systems that process multimedia data streams. In this study, we designed and implemented a new file system which efficiently stores and retrieves multimedia data steams. The proposed file system has a very simple disk layout, which guarantees a quick disk initialization and file system recovery. And we introduced a new indexing-scheme, called the time-based indexing scheme, with the file system. With the indexing scheme, the file system maintains the relation between time and the location for all the multimedia streams. The scheme is useful in searching and playing the compressed multimedia streams by locating exact frame position with given time, resulting in reduction of CPU processing and power consumption. The proposed file system and its APIs utilizing the time-based indexing schemes were implemented firstly on a Linux environment, though it is operating system independent. In the performance evaluation on a real DVR system, which measured the execution time of multi-threaded reading and writing, we found the proposed file system is maximum 38.7% faster than EXT2 file system.

• 대한임베디드공학회논문지
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• 제5권4호
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• pp.225-233
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• 2010

In this paper, we try to improve the performance of the demand paging loader suggested to use the demand paging way that is not based on operating system. The demand paging switching strategy used in the existing operating system can know the recently used pages by running multi-processing. Then, based on it, some page switching strategies have been made for the recently used pages or the frequently demanded pages. However, the strategies based on operating system cannot be applied in single processing that is not based on operating system because any context switching never occur on the single processing. So, this paper is trying to suggest the demand paging switching strategies that can be applied in paging loader running in single process. In the Return-Prediction-Algorithm, we saw the improved performance in the program that the function call occurred frequently in a long distance. And then, in the Most-Frequently-Used-Page-Remain-Algorithm, we saw the improved performance in the program that the references frequently occurred for the particular pages. Likewise, it had an enormous effect on keeping the memory reduction performance by the demand paging and reducing the running time delay at the same time.

• 전자공학회논문지SC
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• 제37권2호
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• pp.60-68
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• 2000

본 논문에서는 표준 메모리 공정에 구현이 가능한 CMOS 전류원의 설계 기법에 대해 논한다. 제안하는 설계기법은 자기바이어스 기법을 활용하여 공급전압의 변화에 대해 매우 좋은 특성을 갖고, 새로운 온도보상 기법을 통해 온도변화에 대한 출력전류 변이의 일차성분을 제거할 수 있으며, 칩 내의 전압잡음에 강한 새로운 전류감지 스타트업 회로를 포함한다. 이러한 CMOS 전류원의 회로설계 기법과 함께 제안된 CMOS 전류원을 초고속 DRAM의 클록 발생회로에 적용할 수 있는 방법에 대해서도 논의한다. 본 논문에서 제안된 CMOS 전류원의 설계기법은 해석적인 방법과 함께 회로 시뮬레이션을 통해 그 유용성을 입증한다.

• 한국전기전자재료학회논문지
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• 제21권8호
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• pp.699-705
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• 2008

Capacitance versus voltage (C-V) characteristics of Ge-nanocrystal (NC)-embedded metal-oxide-semiconductor (MOS) capacitors with $HfO_2$ gate material were investigated in this work. The current versus voltage (I-V) curves obtained from Ge-NC-embedded MOS capacitors fabricated with the $NH_3$ annealed $HfO_2$ gate material reveal the reduction of leakage current, compared with those of MOS capacitors fabricated with the $O_2$ annealed $HfO_2$ gate material. The C-V curves of the Ge-NC-embedded MOS capacitor with $HfO_2$ gate material annealed in $NH_3$ ambient exhibit counterclockwise hysteresis loop of about 3.45 V memory window when bias voltage was varied from -10 to + 10 V. The observed hysteresis loop indicates the presence of charge storages in the Ge NCs caused by the Fowler-Nordheim (F-N) tunneling. In addition, capacitance versus time characteristics of Ge-NC-embedded MOS capacitors with $HfO_2$ gate material were analyzed to investigate their retention property.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권3호
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• pp.356-363
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• 2014

In this paper, we propose a new memristor-based crossbar array architecture, where a single memristor array and constant-term circuit are used to represent both plus-polarity and minus-polarity matrices. This is different from the previous crossbar array architecture which has two memristor arrays to represent plus-polarity and minus-polarity connection matrices, respectively. The proposed crossbar architecture is tested and verified to have the same performance with the previous crossbar architecture for applications of character recognition. For areal density, however, the proposed crossbar architecture is twice better than the previous architecture, because only single memristor array is used instead of two crossbar arrays. Moreover, the power consumption of the proposed architecture can be smaller by 48% than the previous one because the number of memristors in the proposed crossbar architecture is reduced to half compared to the previous crossbar architecture. From the high areal density and high energy efficiency, we can know that this newly proposed crossbar array architecture is very suitable to various applications of analog neuromorphic computing that demand high areal density and low energy consumption.