The Journal of Korean Institute of Communications and Information Sciences (한국통신학회논문지)

The Korean Institute of Commucations and Information Sciences (한국통신학회)
권호 표지
DOI QR코드

DOI QR Code

Power-Minimizing DVFS Algorithm for a Video Decoder with Buffer Constraints

영상 디코더의 제한된 버퍼를 고려한 전력 최소화 DVFS 방식

  • 정승호 (서울과학기술대학교 제어계측공학과 임베디드 네트워크 연구실) ;
  • 안희준 (서울과학기술대학교 제어계측공학과 임베디드 네트워크 연구실)
  • Received : 2011.06.16
  • Accepted : 2011.09.05
  • Published : 2011.09.30
Download PDF
⟨ Previous Next ⟩

Abstract

Power-reduction techniques based on DVFS(Dynamic Voltage and Frequency Scaling) are crucial for lengthening operating times of battery powered mobile systems. This paper proposes an optimal DVFS scheduling algorithm for decoders with memory size limitation on display buffer, which is realistic constraints not properly touched in the previous works. Furthermore, we mathematically prove that the proposed algorithm is optimal in the limited display buffer and limited clock frequency model, and also can be used for feasibility check. Simulation results show the proposed algorithm outperformed the previous heuristic algorithms by 7% in average, and the performance of all algorithms using display buffers saturates at about 10 frame size.

DVFS (Dynamic Voltage and Frequency Scaling) 에 기초한 저전력 기법은 배터리를 사용하는 모바일 장치에서 동작시간 향상을 위하여 매우 중요하다. 본 연구에서는 DVFS기법에 기반을 둔 영상디코더의 에너지 소비를 최소화핸 스케줄링 알고리즘을 제안 한다 특히, 기존연구에서 간과된 디코더와 디스플레이 사이에 위치한 버퍼의 크기 제약을 모델에 포함하여 버퍼 넘침을 방지 하도록하며, 이 모델에서 수학적으로 에너지를 최소화하는 알고리즘을 제안하고 증명하였다. 실제 영상을 통한 시뮬레이션 결과 버퍼의 크기가 10 프레임정도에서 이득이 포화상태가 되며, 제안된 알고리즘이 기존의 직관적인 알고리즘들에 비하여 평균 10% 정도의 전력소모 절약을 얻을 수 있음을 확인하였다.

Keywords

References

  1. 노시봉, 안희준, 이명진, 오혁준, "임베디드 DSP기반 시스템을 위한 H.264 소프트웨어 부호기의 실시간 최적화", 한국통신학회, 10호, 2009
  2. J. Henkel, Sri Parameswaran, "Designing embedded processor", Springer, 2007
  3. D. Sigh, and V. Tiwari, "Power challenge in the Internet world", in Cool Chips, tutorial, in conjunction with the 32th Int. Symp. Microarchitecture, pp.8-15, Nov. 1999
  4. T.D. Burd, T. A. Perimg, A. J. Stratakos, and R.W. Brodersen, "A Dynamic Voltage Scaled Microprocessor System", IEEE Journal of Solid-State Circuits, Nov. 2000.
  5. K. Govil, E. Chan, and H. Wasserman, "Comparing Algorithms for Dynamic Speed-Setting of a Low Power CPU", Proc. 1st Int''l Conference on Mobile Computing and Networking, Nov. 1995
  6. O.S. Unsal and I. Koren, "System-level power-aware design techniques in real-time systems," Proceedings of IEEE Vol.91, No.71, pp.1055-1069, 2003 https://doi.org/10.1109/JPROC.2003.814617
  7. W. Yuan, K. Nahrstedt, "Practical voltage scaling for mobile multimedia devices", in Proc. of ACM Multimedia'04, New York, Oct. 2004
  8. C. Im, H. Kim, and S. Ha. "Dynamic voltage scheduling technique for low-power multimedia applications using buffers", In International Symposium on Low Power Electronics and Design, pages 34-39, Aug. 2001
  9. Z. Lu, J. Lach, M. Stan, and K. Skadron, "Reducing multimedia decode power using feedback control", in Proc. Int. Conf. on Computer Design, pp. 489-796, 2003
  10. M. Mesarina and Y. Turner, "Reduced Energy Decoding of MPEG Streams", ACM/SPIE Multimedia Computing and Networking 2002 (MMCN ''02), Jan. 2002
  11. J. Pouwelse, K. Langendoen, R. Lagendijk, and H. Sips, "Power-Aware Video Decoding", Picture Coding Symposium (PCS ''01), April 2001
  12. D. Son, C. Yu, and H. Kim, "Dynamic Voltage Scaling on MPEG Decoding", International Conference of Parallel and Distributed System (ICPADS), Jun. 2001
  13. E. Nurvitadhi, B. Lee, C. Yu, and M. Kim, "A Comparative Study of Dynamic Voltage Scaling Techniques for Low-Power Video Decoding", International Conference on Embedded Systems and Applications, Jun. 2003
  14. J. D. Salehi, Z.-L. Zhang, J. Kurose, D. Towsley, "Supporting stored video: reducing rate variability and end-to-end resource requirements through optimal smoothing", IEEE/ACM trans. on networking, Vol.6, No.4, Aug. 1998
  15. A. W. Marshall and I. Olkin, Inequalities: Theory of Majorization andits Applications, New York, Academic, 1979
  16. ffmeg, online: www.ffmpeg.org.
  17. B. Case, "Intel Reveals Pentium Implementation Details", Microprocessor Report, pp.9-13, Mar. 1993
  18. x264, online: http://www.videolan.org/developers/x264.html