• Journal of Computing Science and Engineering
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• v.5 no.3
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• pp.161-166
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• 2011

We present a fast algorithm for Korean text extraction and segmentation from subway signboards using smart phone sensors in order to minimize computational time and memory usage. The algorithm can be used as preprocessing steps for optical character recognition (OCR): binarization, text location, and segmentation. An image of a signboard captured by smart phone camera while holding smart phone by an arbitrary angle is rotated by the detected angle, as if the image was taken by holding a smart phone horizontally. Binarization is only performed once on the subset of connected components instead of the whole image area, resulting in a large reduction in computational time. Text location is guided by user's marker-line placed over the region of interest in binarized image via smart phone touch screen. Then, text segmentation utilizes the data of connected components received in the binarization step, and cuts the string into individual images for designated characters. The resulting data could be used as OCR input, hence solving the most difficult part of OCR on text area included in natural scene images. The experimental results showed that the binarization algorithm of our method is 3.5 and 3.7 times faster than Niblack and Sauvola adaptive-thresholding algorithms, respectively. In addition, our method achieved better quality than other methods.

• The Transactions of the Korea Information Processing Society
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• v.6 no.4
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• pp.988-998
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• 1999

This paper is to investigate the method of reducing the number of fuzzy rules with the help of LVQ. a large number of training patterns usually leads to a large set of fuzzy rules that require a large computer memory and take a long time to perform classification. so, in order to solve these problems, it is necessary to study to minimize the number of fuzzy rules. However, so as to minimize the performance degradation resulting from the reduction of fuzzy rules, fuzzy rules are generated after training the high-quality initial reference pattern. Through the simulation, we confirm that the proposed method is very effective.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.9B
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• pp.1082-1091
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• 2011

Power-reduction techniques based on DVFS(Dynamic Voltage and Frequency Scaling) are crucial for lengthening operating times of battery powered mobile systems. This paper proposes an optimal DVFS scheduling algorithm for decoders with memory size limitation on display buffer, which is realistic constraints not properly touched in the previous works. Furthermore, we mathematically prove that the proposed algorithm is optimal in the limited display buffer and limited clock frequency model, and also can be used for feasibility check. Simulation results show the proposed algorithm outperformed the previous heuristic algorithms by 7% in average, and the performance of all algorithms using display buffers saturates at about 10 frame size.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1260-1263
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• 2005

Data storage related with writing and retrieving requires high storage capacity, fast transfer rate and less access time. Today any data storage system cannot satisfy these conditions, however holographic data storage system can perform faster data transfer rate because it is a page oriented memory system using volume hologram in writing and retrieving data. System can be constructed without mechanical actuating part therefore fast data transfer rate and high storage capacity about 1Tb/cm3 can be realized. In this research, to reduce errors of binary data stored in holographic data storage system, a new method for bit error reduction is suggested. First, find fuzzy rule using experimental system for Element of Holographic Digital Data System. Second, make fuzzy rule table using Genetic algorithm. Third, reduce prior error element and recording Digital Data. Recording ratio and reconstruction ratio will be very good performance

• Journal of the Korean Magnetics Society
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• v.1 no.2
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• pp.79-84
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• 1991

A variational approach employing localized functional is presented to solve alternating magnetic field problems with open boundary. The functional used in the approach consists of the domain integral of finite element region only and the boundary integral of the interfacial boundary between the finite and infinite element regions. The boundary integral is obtained by transforming the infinite domain integral for the infinite element region into the interfacial boundary integral. The proposed algorithm is then applied to a simple two-dimensional problem where the analytic solutions are available. It is shown that the algorithm makes it possible to yield good agreements between the numerical and analytic solutions. and that it requires less computer storage memory and computation time than the conventional finite element method due to the reduction of the computing region.

• IEMEK Journal of Embedded Systems and Applications
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• v.1 no.2
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• pp.90-103
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• 2006

There are many file systems in various operating systems. Those are usually designed for server environments, where the common cases are usually 'multiple active users', 'great many small files' And they assume a big main memory to be used as buffer cache. So the existing file systems are not suitable for resource hungry embedded systems that process multimedia data streams. In this study, we designed and implemented a new file system which efficiently stores and retrieves multimedia data steams. The proposed file system has a very simple disk layout, which guarantees a quick disk initialization and file system recovery. And we introduced a new indexing-scheme, called the time-based indexing scheme, with the file system. With the indexing scheme, the file system maintains the relation between time and the location for all the multimedia streams. The scheme is useful in searching and playing the compressed multimedia streams by locating exact frame position with given time, resulting in reduction of CPU processing and power consumption. The proposed file system and its APIs utilizing the time-based indexing schemes were implemented firstly on a Linux environment, though it is operating system independent. In the performance evaluation on a real DVR system, which measured the execution time of multi-threaded reading and writing, we found the proposed file system is maximum 38.7% faster than EXT2 file system.

• IEMEK Journal of Embedded Systems and Applications
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• v.5 no.4
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• pp.225-233
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• 2010

In this paper, we try to improve the performance of the demand paging loader suggested to use the demand paging way that is not based on operating system. The demand paging switching strategy used in the existing operating system can know the recently used pages by running multi-processing. Then, based on it, some page switching strategies have been made for the recently used pages or the frequently demanded pages. However, the strategies based on operating system cannot be applied in single processing that is not based on operating system because any context switching never occur on the single processing. So, this paper is trying to suggest the demand paging switching strategies that can be applied in paging loader running in single process. In the Return-Prediction-Algorithm, we saw the improved performance in the program that the function call occurred frequently in a long distance. And then, in the Most-Frequently-Used-Page-Remain-Algorithm, we saw the improved performance in the program that the references frequently occurred for the particular pages. Likewise, it had an enormous effect on keeping the memory reduction performance by the demand paging and reducing the running time delay at the same time.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.2
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• pp.60-68
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• 2000

This paper describes a design methodology for the CMOS current source which can be implemented in standard memory process. The proposed techniques provide a good characteristic against the power-supply variation by utilizing a self-bias circuit and the reduction of the first-order component of the temperature variation through the new temperature compensation technique and include a new current-sensing start-up circuit enabling a robust operation against the voltage noise generated during the operation of the chip. In addition to the circuit-design technology, techniques where the proposed CMOS current-reference circuit can be applied to the clocking circuits of a very high-speed DRAM are presented. The feasibility of the suggested design methodology for the CMOS current reference is demonstrated by both the analytical method and the circuit simulation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.8
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• pp.699-705
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• 2008

Capacitance versus voltage (C-V) characteristics of Ge-nanocrystal (NC)-embedded metal-oxide-semiconductor (MOS) capacitors with $HfO_2$ gate material were investigated in this work. The current versus voltage (I-V) curves obtained from Ge-NC-embedded MOS capacitors fabricated with the $NH_3$ annealed $HfO_2$ gate material reveal the reduction of leakage current, compared with those of MOS capacitors fabricated with the $O_2$ annealed $HfO_2$ gate material. The C-V curves of the Ge-NC-embedded MOS capacitor with $HfO_2$ gate material annealed in $NH_3$ ambient exhibit counterclockwise hysteresis loop of about 3.45 V memory window when bias voltage was varied from -10 to + 10 V. The observed hysteresis loop indicates the presence of charge storages in the Ge NCs caused by the Fowler-Nordheim (F-N) tunneling. In addition, capacitance versus time characteristics of Ge-NC-embedded MOS capacitors with $HfO_2$ gate material were analyzed to investigate their retention property.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.3
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• pp.356-363
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• 2014

In this paper, we propose a new memristor-based crossbar array architecture, where a single memristor array and constant-term circuit are used to represent both plus-polarity and minus-polarity matrices. This is different from the previous crossbar array architecture which has two memristor arrays to represent plus-polarity and minus-polarity connection matrices, respectively. The proposed crossbar architecture is tested and verified to have the same performance with the previous crossbar architecture for applications of character recognition. For areal density, however, the proposed crossbar architecture is twice better than the previous architecture, because only single memristor array is used instead of two crossbar arrays. Moreover, the power consumption of the proposed architecture can be smaller by 48% than the previous one because the number of memristors in the proposed crossbar architecture is reduced to half compared to the previous crossbar architecture. From the high areal density and high energy efficiency, we can know that this newly proposed crossbar array architecture is very suitable to various applications of analog neuromorphic computing that demand high areal density and low energy consumption.