• Title/Summary/Keyword: Memory reduction

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Code Rate 1/2, 2304-b LDPC Decoder for IEEE 802.16e WiMAX (IEEE 802.16e WiMAX용 부호율 1/2, 2304-비트 LDPC 복호기)

  • Kim, Hae-Ju;Shin, Kyung-Wook
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.4A
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    • pp.414-422
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    • 2011
  • This paper describes a design of low-density parity-check(LDPC) decoder supporting block length 2,304-bit and code rate 1/2 of IEEE 802.16e mobile WiMAX standard. The designed LDPC decoder employs the min-sum algorithm and partially parallel layered-decoding architecture which processes a sub-matrix of $96{\times}96$ in parallel. By exploiting the properties of the min-sum algorithm, a new memory reduction technique is proposed, which reduces check node memory by 46% compared to conventional method. Functional verification results show that it has average bit-error-rate(BER) of $4.34{\times}10^{-5}$ for AWGN channel with Fb/No=2.1dB. Our LDPC decoder synthesized with a $0.18{\mu}m$ CMOS cell library has 174,181 gates and 52,992 bits memory, and the estimated throughput is about 417 Mbps at 100-MHz@l.8-V.

A Variable-Length FFT/IFFT Processor for Multi-standard OFDM Systems (다중표준 OFDM 시스템용 가변길이 FFT/IFFT 프로세서)

  • Yeem, Chang-Wan;Shin, Kyung-Wook
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.2A
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    • pp.209-215
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    • 2010
  • This paper describes a design of variable-length FFT/IFFT processor (VL_FCore) for OFDM-based multi-standard communication systems. The VL_FCore adopts in-place single-memory architecture, and uses a hybrid structure of radix-4 and radix-2 DIF algorithms to accommodate various FFT lengths in the range of $N=64{\times}2^k\;(0{\leq}k{\leq}7)$. To achieve both memory size reduction and the improved SQNR, a two-step conditional scaling technique is devised, which conditionally scales the intermediate results of each computational stage. The performance analysis results show that the average SQNR's of 64~8,192-point FFT's are over 60-dB. The VL_FCore synthesized with a $0.35-{\mu}m$ CMOS cell library has 23,000 gates and 32 Kbytes memory, and it can operate with 75-MHz@3.3-V clock. The 64-point and 8,192-point FFT's can be computed in $2.25-{\mu}s$ and $762.7-{\mu}s$, respectively, thus it satisfies the specifications of various OFDM-based systems.

Chronic cerebral hypoperfusion and plasticity of the posterior cerebral artery following permanent bilateral common carotid artery occlusion

  • Cho, Kyung-Ok;Kim, Seul-Ki;Kim, Seong Yun
    • The Korean Journal of Physiology and Pharmacology
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    • v.21 no.6
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    • pp.643-650
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    • 2017
  • Vascular dementia (VaD) is a group of heterogeneous diseases with the common feature of cerebral hypoperfusion. To identify key factors contributing to VaD pathophysiology, we performed a detailed comparison of Wistar and Sprague-Dawley (SD) rats subjected to permanent bilateral common carotid artery occlusion (BCCAo). Eight-week old male Wistar and SD rats underwent BCCAo, followed by a reference memory test using a five-radial arm maze with tactile cues. Continuous monitoring of cerebral blood flow (CBF) was performed with a laser Doppler perfusion imaging (LDPI) system. A separate cohort of animals was sacrificed for evaluation of the brain vasculature and white matter damage after BCCAo. We found reference memory impairment in Wistar rats, but not in SD rats. Moreover, our LDPI system revealed that Wistar rats had significant hypoperfusion in the brain region supplied by the posterior cerebral artery (PCA). Furthermore, Wistar rats showed more profound CBF reduction in the forebrain region than did SD rats. Post-mortem analysis of brain vasculature demonstrated greater PCA plasticity at all time points after BCCAo in Wistar rats. Finally, we confirmed white matter rarefaction that was only observed in Wistar rats. Our studies show a comprehensive and dynamic CBF status after BCCAo in Wistar rats in addition to severe PCA dolichoectasia, which correlated well with white matter lesion and memory decline.

A Design of Efficient Scan Converter for Image Compression CODEC (영상압축코덱을 위한 효율적인 스캔변환기 설계)

  • Lee, Gunjoong;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.2
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    • pp.386-392
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    • 2015
  • Data in a image compression codec are processed with a specific regular block size. The processing order of block sized data is changed in specific function blocks and the data is packed in memory and read by a new sequence. To maintain a regular throughput rate, double buffering is normally used that interleaving two block sized memory to do concurrent read and write operations. Single buffering using only one block sized memory can be adopted to the simple data reordering, but when a complicate reordering occurs, irregular address changes prohibit from implementing adequate address generating for single buffering. This paper shows that there is a predictable and recurring regularity of changing address access orders within a finite updating counts and suggests an effective method to implement. The data reordering function using suggested idea is designed with HDL and implemented with TSMC 0.18 CMOS process library. In various scan blocks, it shows more than 40% size reduction compared with a conventional method.

Effect of Oxygen Content on Shape Memory Characteristics of Ti-18Nb-6Zr-XO (X = 0~1.5at%) Alloys (생체용 Ti-18Nb-6Zr-XO (X = 0~1.5at%) 합금의 형상기억특성에 미치는 산소 농도의 영향)

  • Park, Young-Chul;Ock, Ji-Myeon;Oh, Jeong-Hwa;Park, Su-Ho;Lee, Jun-Hee;Kim, Jae-Il
    • Korean Journal of Materials Research
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    • v.21 no.11
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    • pp.617-622
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    • 2011
  • The effect of oxygen on the shape memory characteristics in Ti-18Nb-6Zr-XO (X = 0-1.5 at%) biomedical alloys was investigated by tensile tests. The alloys were fabricated by an arc melting method at Ar atmosphere. The ingots were cold-rolled to 0.45 mm with a reduction up to 95% in thickness. After severe cold-rolling, the plate was solution-treated at 1173 K for 1.8 ks. The fracture stress of the solution-treated specimens increased from 450 Mpa to 880 MPa with an increasing oxygen content up to 1.5%. The fracture stress increased by 287MPa with 1 at% increase of oxygen content. The critical stress for slip increased from 430 MPa to 695 MPa with an increasing oxygen content up to 1.5 at%. The maximum recovery strain of 4.1% was obtained in the Ti-18Nb-6Zr-0.5O (at%) alloy. The martensitic transformation temperature decreased by 140 K with a 1.0 at% increase in O content, which is lower than that of Ti-22Nb-(0-2.0)O (at%) by 20 K. This may have been caused by the effect of the addition of Zr. This study confirmed that addition of oxygen to the Ti-Nb-Zr alloy increases the critical stress for slip due to solid solution hardening without being detrimental to the maximum recovery strain.

A variable-length FFT/IFFT processor design using single-memory architecture (단일메모리 구조의 가변길이 FFT/IFFT 프로세서 설계)

  • Yeem, Chang-Wan;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.10a
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    • pp.393-396
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    • 2009
  • This paper describes a design of variable-length FFT/IFFT processor for OFDM-based communication systems. The designed FFT/IFFT processor adopts the in-place single-memory architecture, and uses a hybrid structure of radix-4 and radix-2 DIF algorithms to accommodate FFT lengths of $N=64{\times}2^k$ ($0{\leq}k{\leq}7$). To achieve both memory size reduction and the improved SQNR, a two-step conditional scaling technique is devised, which conditionally scales the intermediate results of each computational stage. The performance analysis results show that the average SQNR's of 64~8,192-point FFT's are over 60-dB. The processor synthesized with a $0.35-{\mu}m$ CMOS cell library can operate with 75-MHz@3.3-V clock, and 64-point and 8,192-point FFT's can be computed in $2.55-{\mu}s$ and $762.7-{\mu}s$, respectively, thus it satisfies the specifications of wireless LAN, DMB, and DVB systems.

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Adaptive-length pendulum smart tuned mass damper using shape-memory-alloy wire for tuning period in real time

  • Pasala, Dharma Theja Reddy;Nagarajaiah, Satish
    • Smart Structures and Systems
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    • v.13 no.2
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    • pp.203-217
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    • 2014
  • Due to the shift in paradigm from passive control to adaptive control, smart tuned mass dampers (STMDs) have received considerable attention for vibration control in tall buildings and bridges. STMDs are superior to tuned mass dampers (TMDs) in reducing the response of the primary structure. Unlike TMDs, STMDs are capable of accommodating the changes in primary structure properties, due to damage or deterioration, by tuning in real time based on a local feedback. In this paper, a novel adaptive-length pendulum (ALP) damper is developed and experimentally verified. Length of the pendulum is adjusted in real time using a shape memory alloy (SMA) wire actuator. This can be achieved in two ways i) by changing the amount of current in the SMA wire actuator or ii) by changing the effective length of current carrying SMA wire. Using an instantaneous frequency tracking algorithm, the dominant frequency of the structure can be tracked from a local feedback signal, then the length of pendulum is adjusted to match the dominant frequency. Effectiveness of the proposed ALP-STMD mechanism, combined with the STFT frequency tracking control algorithm, is verified experimentally on a prototype two-storey shear frame. It has been observed through experimental studies that the ALP-STMD absorbs most of the input energy associated in the vicinity of tuned frequency of the pendulum damper. The reduction of storey displacements up to 80 % when subjected to forced excitation (harmonic and chirp-signal) and a faster decay rate during free vibration is observed in the experiments.

Compact CNN Accelerator Chip Design with Optimized MAC And Pooling Layers (MAC과 Pooling Layer을 최적화시킨 소형 CNN 가속기 칩)

  • Son, Hyun-Wook;Lee, Dong-Yeong;Kim, HyungWon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.9
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    • pp.1158-1165
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    • 2021
  • This paper proposes a CNN accelerator which is optimized Pooling layer operation incorporated in Multiplication And Accumulation(MAC) to reduce the memory size. For optimizing memory and data path circuit, the quantized 8bit integer weights are used instead of 32bit floating-point weights for pre-training of MNIST data set. To reduce chip area, the proposed CNN model is reduced by a convolutional layer, a 4*4 Max Pooling, and two fully connected layers. And all the operations use specific MAC with approximation adders and multipliers. 94% of internal memory size reduction is achieved by simultaneously performing the convolution and the pooling operation in the proposed architecture. The proposed accelerator chip is designed by using TSMC65nmGP CMOS process. That has about half size of our previous paper, 0.8*0.9 = 0.72mm2. The presented CNN accelerator chip achieves 94% accuracy and 77us inference time per an MNIST image.

Efficient Hyperplane Generation Techniques for Human Activity Classification in Multiple-Event Sensors Based Smart Home (다중 이벤트 센서 기반 스마트 홈에서 사람 행동 분류를 위한 효율적 의사결정평면 생성기법)

  • Chang, Juneseo;Kim, Boguk;Mun, Changil;Lee, Dohyun;Kwak, Junho;Park, Daejin;Jeong, Yoosoo
    • IEMEK Journal of Embedded Systems and Applications
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    • v.14 no.5
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    • pp.277-286
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    • 2019
  • In this paper, we propose an efficient hyperplane generation technique to classify human activity from combination of events and sequence information obtained from multiple-event sensors. By generating hyperplane efficiently, our machine learning algorithm classify with less memory and run time than the LSVM (Linear Support Vector Machine) for embedded system. Because the fact that light weight and high speed algorithm is one of the most critical issue in the IoT, the study can be applied to smart home to predict human activity and provide related services. Our approach is based on reducing numbers of hyperplanes and utilizing robust string comparing algorithm. The proposed method results in reduction of memory consumption compared to the conventional ML (Machine Learning) algorithms; 252 times to LSVM and 34,033 times to LSTM (Long Short-Term Memory), although accuracy is decreased slightly. Thus our method showed outstanding performance on accuracy per hyperplane; 240 times to LSVM and 30,520 times to LSTM. The binarized image is then divided into groups, where each groups are converted to binary number, in order to reduce the number of comparison done in runtime process. The binary numbers are then converted to string. The test data is evaluated by converting to string and measuring similarity between hyperplanes using Levenshtein algorithm, which is a robust dynamic string comparing algorithm. This technique reduces runtime and enables the proposed algorithm to become 27% faster than LSVM, and 90% faster than LSTM.

Long Short-Term Memory Neural Network assisted Peak to Average Power Ratio Reduction for Underwater Acoustic Orthogonal Frequency Division Multiplexing Communication

  • Waleed, Raza;Xuefei, Ma;Houbing, Song;Amir, Ali;Habib, Zubairi;Kamal, Acharya
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.17 no.1
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    • pp.239-260
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    • 2023
  • The underwater acoustic wireless communication networks are generally formed by the different autonomous underwater acoustic vehicles, and transceivers interconnected to the bottom of the ocean with battery deployed modems. Orthogonal frequency division multiplexing (OFDM) has become the most popular modulation technique in underwater acoustic communication due to its high data transmission and robustness over other symmetrical modulation techniques. To maintain the operability of underwater acoustic communication networks, the power consumption of battery-operated transceivers becomes a vital necessity to be minimized. The OFDM technology has a major lack of peak to average power ratio (PAPR) which results in the consumption of more power, creating non-linear distortion and increasing the bit error rate (BER). To overcome this situation, we have contributed our symmetry research into three dimensions. Firstly, we propose a machine learning-based underwater acoustic communication system through long short-term memory neural network (LSTM-NN). Secondly, the proposed LSTM-NN reduces the PAPR and makes the system reliable and efficient, which turns into a better performance of BER. Finally, the simulation and water tank experimental data results are executed which proves that the LSTM-NN is the best solution for mitigating the PAPR with non-linear distortion and complexity in the overall communication system.