• Journal of the Korea Society of Computer and Information
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• v.24 no.4
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• pp.1-9
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• 2019

LRR(Loose Round Robin) warp scheduling policy for GPU architecture results in high warp-level parallelism and balanced loads across multiple warps. However, traditional LRR policy makes multiple warps execute long latency operations at the same time. In cases that no more warps to be issued under long latency, the throughput of GPUs may be degraded significantly. In this paper, we propose a new warp scheduling policy which utilizes latency hiding, leading to more utilized memory resources in high performance GPUs. The proposed warp scheduler prioritizes memory instruction based on GTO(Greedy Then Oldest) policy in order to provide reduced memory stalls. When no warps can execute memory instruction any more, the warp scheduler selects a warp for computation instruction by round robin manner. Furthermore, our proposed technique achieves high performance by using additional information about recently committed warps. According to our experimental results, our proposed technique improves GPU performance by 12.7% and 5.6% over LRR and GTO on average, respectively.

• Journal of Internet Technology
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• v.21 no.3
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• pp.849-859
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• 2020

High-performance computing (HPC) systems provide huge computational resources and large memories. The hybrid memory is a promising memory technology that contains different types of memory devices, which have different characteristics regarding access time, retention time, and capacity. However, the increasing performance and employing hybrid memories induce more complexity as well. In this paper, we propose a roofline-based data migration methodology called HyDM to effectively use hybrid memories targeting at Intel Knight Landing (KNL) processor. HyDM monitors status of applications running on a system and migrates pages of selected applications to the High Bandwidth Memory (HBM). To select appropriate applications on system runtime, we adopt the roofline performance model, a visually intuitive method. HyDM also employs a feedback mechanism to change the target application dynamically. Experimental results show that our HyDM improves over the baseline execution the execution time by up to 44%.

• Research in Vestibular Science
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• v.17 no.4
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• pp.134-141
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• 2018

Objectives: We aimed to study the role of vestibular input on spatial memory performance in mice that had undergone bilateral surgical labyrinthectomy, semicircular canal (SCC) occlusion and 4G hypergravity exposure. Methods: Twelve to 16 weeks old ICR mice (n=30) were used for the experiment. The experimental group divided into 3 groups. One group had undergone bilateral chemical labyrinthectomy, and the other group had performed SCC occlusion surgery, and the last group was exposed to 4G hypergravity for 2 weeks. The movement of mice was recorded using camera in Y maze which had 3 radial arms (35 cm long, 7 cm high, 10 cm wide). We counted the number of visiting arms and analyzed the information of arm selection using program we developed before and after procedure. Results: The bilateral labyrinthectomy group which semicircular canal and otolithic function was impaired showed low behavioral performance and spacial memory. The semicircular canal occlusion with $CO_2$ laser group which only semicircular canal function was impaired showed no difference in performance activity and spatial memory. However the hypergravity exposure group in which only otolithic function impaired showed spatial memory function was affected but the behavioral performance was spared. The impairment of spatial memory recovered after a few days after exposure in hypergravity group. Conclusions: This spatial memory function was affected by bilateral vestibular loss. Space-related information processing seems to be determined by otolithic organ information rather than semicircular canals. Due to otolithic function impairment, spatial learning was impaired after exposure to gravity changes in animals and this impaired performance was compensated after normal gravity exposure.

• The KIPS Transactions:PartA
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• v.14A no.1 s.105
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• pp.39-46
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• 2007

Recently flash memory is widely accepted as a storage devise of embedded systems for portability and performance reasons. Flash memory has many distinguishing features compared to legacy magnetic disks. Especially, a file system for flash memory usually assumes the form of log-structured file system and it employs garbage collector accordingly. Since the garbage collector can greatly affect the performance of file system, it should be designed carefully considering flash memory features. In this paper, we suggest a new garbage collector for existing JFFS2 (Journaling Flash File System II) file system. By extensive performance evaluation, we show that the proposed garbage collector achieves improved performance in terms of flash memory consumption rate, increased flash memory life time, and improved wear-leveling.

• Journal of the Korea Convergence Society
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• v.11 no.6
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• pp.203-208
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• 2020

This study examined whether Mild Cognitive Impairment (MCI) is related to the reduction of specific memory among linguistic memory and visuospatial memory, and to identify the most predictive index for discriminating MCI from normal elderly. The subjects were analyzed for 189 elderly (103 healthy elderly, 86 MCI). The verbal memory was used by the Seoul Verbal Learning Test. visuospatial memory was measured using the Rey Complex Figure Test. As a result of multiple logistic regression, verbal memory and visuospatial memory showed significant predictive performance in discriminating MCI from normal elderly. On the other hand, when all the confounding variables were corrected, including the results of each memory test, the predictive power was significant in distinguishing MCI from normal aging only in the immediate recall of verbal memory, and the predictive power was not significant in the immediate recall of visuospatial memory. This result suggests that delayed recall of visuospatial memory and immediate recall of verbal memory are the best combinations to discriminate memory ability of MCI.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.9
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• pp.445-458
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• 2007

This article presents a novel infrastructure for large-memory database processing using commodity hardware with operating system support. We exploit inexpensive PCs and a high-speed network capable of Remote Direct Memory Access (RDMA) operations to build a new memory hierarchy between fast volatile memory and slow disk storage. The new memory hierarchy guarantees a reasonable response time, and its storage size enables us to run large-memory database systems with little performance degradation. The proposed architecture has two main components: (1) a remote memory system inside the Linux kernel to manage other computers' memory pages efficiently and (2) a remote memory pager responsible for manipulating remote read/write operations on remote memory pages. We insist that the proposed architecture is practical enough to support the rigorous demands of commercial in-memory database systems by demonstrating the performance of publicly available main-memory databases (e.g., MySQL) on our prototyped system. The experimental results show very interesting results from the TPC-C benchmark.

• The Transactions of the Korea Information Processing Society
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• v.3 no.6
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• pp.1433-1442
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• 1996

Data distribution of SPMD(Single Program Multiple Data) pattern is one of main features of HPF (High Performance Fortran). This paper describes design is sues for such data distribution and its efficient execution model on TICOM IV computer, named SPAX(Scalable Parallel Architecture computer based on X-bar network). SPAX has a hierarchical clustering structure that uses distributed shared memory(DSM). In such memory structure, it cannot make a full system utilization to apply unanimously either SMDD(shared Memory Data Distribution) or DMDD(Distributed Memory Data Distribution). Here we propose another data distribution model, called DSMDD(Distributed Shared Memory Data Distribution), a data distribution model based on hierarchical masters-slaves scheme. In this model, a remote master and slaves are designated in each node, shared address scheme is used within a node and message passing scheme between nodes. In our simulation, assuming a node size in which system performance degradation is minimized,DSMDD is more effective than SMDD and DMDD. Especially,the larger number of logical processors and the less data dependency between distributed data,the better performace is obtained.

• Journal of the Korea Society of Computer and Information
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• v.25 no.4
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• pp.1-9
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• 2020

In this paper, we propose Dynamic Rank Subsetting (DRAS) technique that enhances the energy-efficiency and the performance of memory system through the data compression. The goal of this technique is to enable a partial chip access by storing data in a compressed format within a subset of DRAM chips. To this end, a memory rank is dynamically configured to two independent sub-ranks. When writing a data block, it is compressed with a data compression algorithm and stored in one of the two sub-ranks. To service a memory request for the compressed data, only a sub-rank is accessed, whereas, for a memory request for the uncompressed data, two sub-ranks are accessed as done in the conventional memory systems. Since DRAS technique requires minimal hardware modification, it can be used in the conventional memory systems with low hardware overheads. Through experimental evaluation with a memory simulator, we show that the proposed technique improves the performance of the memory system by 12% on average and reduces the power consumption of memory system by 24% on average.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.115-116
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• 2012

The demand for flexible electronic systems such as wearable computers, E-paper, and flexible displays has increased due to their advantages of excellent portability, conformal contact with curved surfaces, light weight, and human friendly interfaces over present rigid electronic systems. This seminar introduces three recent progresses that can extend the application of high performance flexible inorganic electronics. The first part of this seminar will introduce a RRAM with a one transistor-one memristor (1T-1M) arrays on flexible substrates. Flexible memory is an essential part of electronics for data processing, storage, and radio frequency (RF) communication and thus a key element to realize such flexible electronic systems. Although several emerging memory technologies, including resistive switching memory, have been proposed, the cell-to-cell interference issue has to be overcome for flexible and high performance nonvolatile memory applications. The cell-to-cell interference between neighbouring memory cells occurs due to leakage current paths through adjacent low resistance state cells and induces not only unnecessary power consumption but also a misreading problem, a fatal obstacle in memory operation. To fabricate a fully functional flexible memory and prevent these unwanted effects, we integrated high performance flexible single crystal silicon transistors with an amorphous titanium oxide (a-TiO2) based memristor to control the logic state of memory. The $8{\times}8$ NOR type 1T-1M RRAM demonstrated the first random access memory operation on flexible substrates by controlling each memory unit cell independently. The second part of the seminar will discuss the flexible GaN LED on LCP substrates for implantable biosensor. Inorganic III-V light emitting diodes (LEDs) have superior characteristics, such as long-term stability, high efficiency, and strong brightness compared to conventional incandescent lamps and OLED. However, due to the brittle property of bulk inorganic semiconductor materials, III-V LED limits its applications in the field of high performance flexible electronics. This seminar introduces the first flexible and implantable GaN LED on plastic substrates that is transferred from bulk GaN on Si substrates. The superb properties of the flexible GaN thin film in terms of its wide band gap and high efficiency enable the dramatic extension of not only consumer electronic applications but also the biosensing scale. The flexible white LEDs are demonstrated for the feasibility of using a white light source for future flexible BLU devices. Finally a water-resist and a biocompatible PTFE-coated flexible LED biosensor can detect PSA at a detection limit of 1 ng/mL. These results show that the nitride-based flexible LED can be used as the future flexible display technology and a type of implantable LED biosensor for a therapy tool. The final part of this seminar will introduce a highly efficient and printable BaTiO3 thin film nanogenerator on plastic substrates. Energy harvesting technologies converting external biomechanical energy sources (such as heart beat, blood flow, muscle stretching and animal movements) into electrical energy is recently a highly demanding issue in the materials science community. Herein, we describe procedure suitable for generating and printing a lead-free microstructured BaTiO3 thin film nanogenerator on plastic substrates to overcome limitations appeared in conventional flexible ferroelectric devices. Flexible BaTiO3 thin film nanogenerator was fabricated and the piezoelectric properties and mechanically stability of ferroelectric devices were characterized. From the results, we demonstrate the highly efficient and stable performance of BaTiO3 thin film nanogenerator.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.2
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• pp.1-9
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• 2013

Recently flexible electronic devices have attracted a great deal of attention because of new application possibilities including flexible display, flexible memory, flexible solar cell and flexible sensor. In particular, development of flexible memory is essential to complete the flexible integrated systems such as flexible smart phone and wearable computer. Research of flexible memory has primarily focused on organic-based materials. However, organic flexible memory has still several disadvantages, including lower electrical performance and long-term reliability. Therefore, emerging research in flexible electronics seeks to develop flexible and stretchable technologies that offer the high performance of conventional wafer-based devices as well as superior flexibility. Development of flexible memory with inorganic silicon materials is based on the design principle that any material, in sufficiently thin form, is flexible and bendable since the bending strain is directly proportional to thickness. This article reviews progress in recent technologies for flexible memory and flexible electronics with inorganic silicon materials, including transfer printing technology, wavy or serpentine interconnection structure for reducing strain, and wafer thinning technology.