• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.11a
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• pp.800-803
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• 2002

The MONOS capacitor are fabricated to investigate the carrier trapping due to Fowler-Nordheim tunneling injection. The carrier trapping in scaled multi-dielectric(ONO) depends on the nitride and Op oxide thickness under Fowler_Nordheim tunneling injection. Carriers captured at nitride film could not escape from nitride to gate, but be captured at top oxide and nitride interface traps because of barrier height of top oxide. Therefore, it is expected that the MONOS memory devices using multi dielectric films enhance memory effect and have a long memory retention characteristic.

• International Journal of Industrial Entomology and Biomaterials
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• v.15 no.1
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• pp.39-45
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• 2007

Extracts of adult worker bodies of Vespa simillima in 2 % NaCl or acidified methanol were administered orally to mice for 70 days. Following this period, memory at one-day and one-month periods, and the effects on scopolamine-induced amnesia were examined using a step-through passive avoidance task. Changes in MK-801-induced disability after 8 days of training, and in memory one month after the trial were also assessed. Mice treated with the 2% NaCl extract showed significant improvement in memory in the behavioral tests one month after the trial, whereas mice receiving the extract in acidified methanol, did not differ from the controls in any trial. The results inidicate that Vespa simillima contains substances acting favorably on the cerebral functions of mammals.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.2
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• pp.147-152
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• 2016

In this study, we fabricated Ag-based electrochemical metallization memory devices which is also called conductive-bridge random-access memory (CBRAM) in order to investigate the resistive switching behavior depending on the bottom electrode (BE). RRAM cells of two different layer configurations having $Ag/Si_3N_4/TiN$ and $Ag/Si_3N_4/p^+$ Si are studied for metal-insulator-metal (MIM) and metal-insulator-silicon (MIS) structures, respectively. Switching voltages including forming/set/reset are lower for MIM than for MIS structure. It is found that the workfunction different affects the performances.

• Korean Journal of Child Studies
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• v.20 no.3
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• pp.293-306
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• 1999

This study investigated children's spatial skills and short term memory ability based on their practice with computer games. The 40 four-year-old and 40 six-year-old subjects were divided by experimental and control groups. Spatial skills of children were assessed by visual speed, mental rotation, and spatial visualization tasks. Short term memory was measured with a digit span task. Results showed that computer game practice enhanced children's memory ability and spatial skills. Even 4-year-olds performed better on mental rotation and spatial visualization tasks after practice. The treatment effect was significant for visual speed of 6-year-olds, short term memory ability and mental rotation of 4-year-olds, and spatial visualization of both 4- and 6-year-olds.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.11a
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• pp.13-16
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• 1998

An anomalous current characteristics which show the superposition of a low current level and high current level at the subthreshold region when SONOSFETs are in memory states were investigated. We have assumed this phenomena were resulted from the effect of parasitic transistors by LOCOS isolation and were modeled to a parallel equivalent circuit of one memory transistor and two parasitic transistors. Theoretical curves are well fitted in measured log I$_{D}$-V$_{G}$ curves independent of channel width of memory devices. The difference between low current level and high current level is apparently decreased with decrease of channel width of devices because parasitic devices dominantly contribute to the current conduction with decrease of channel width of memory devices. As a result, we concluded that the LOCOS isolation has to selectively adopt in the design of process for charge-trap type NVSM.VSM.

• IEMEK Journal of Embedded Systems and Applications
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• v.11 no.2
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• pp.107-116
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• 2016

Density of Phase-Change Memory (PCM) devices has been doubled through the employment of multi-level cell (MLC) technology. However, this doubled-capacity comes in the expense of severe performance degradation, as compared to the conventional single-level cell (SLC) PCM. This negative effect on the performance of the MLC PCM detracts from the potential benefits of the MLC PCM. This paper introduces an efficient way of minimizing the performance degradation while maximizing the capacity benefits of the MLC PCM. To this end, we propose a location-aware hybrid management of SLC and MLC in compressed PCM main memory systems. Our trace-driven simulations using real application workloads demonstrate that the proposed technique enhances the performance and energy consumption by 45.1% and 46.5%, respectively, on the average, over the conventional technique that only uses a MLC PCM.

• Research in Mathematical Education
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• v.13 no.3
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• pp.181-195
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• 2009

Students' approaches to mathematical problem solving vary greatly with each other. The main objective of the current study was to compare students' performance with different thinking styles (divergent vs. convergent) and working memory capacity upon mathematical problem solving. A sample of 150 high school girls, ages 15 to 16, was studied based on Hudson's test and Digit Span Backwards test as well as a math exam. The results indicated that the effect of thinking styles and working memory on students' performance in problem solving was significant. Moreover, students with divergent thinking style and high working memory capacity showed higher performance than ones with convergent thinking style. The implications of these results on math teaching and problem solving emphasizes that cognitive predictor variable (Convergent/Divergent) and working memory, in particular could be challenging and a rather distinctive factor for students.

• Journal of the Korean Home Economics Association
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• v.19 no.2
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• pp.1-9
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• 1981

The phenomena of memory have been shown to come out early in life and to develop drastically for early childhood. Therefore, the purpose of this study were examine the development of memory of Korean children and also to see the memory span of Korean children. the subjects in this study were 80 children (male and female each 40 children) from age 3 to age 6. These subjects were devide into two age groups (3~4 age, 5~6 age). the stimulus materials were the numbers and the words. The numbers in this study were chosen from the number problems of WISC. The 42 words which consisted of two phonemes were selected. The number of items was 3 to 9 on the first through the last trial. altogether 14 trials, 7 trials for numbers and 7 trials for words, were given to each subject. Free recall method was sued. The following conclusions could be made. 1. The memory span of Korean early childhood increased as the age of the children increased. 2. The primacy effect was appeared when the age increased. Therefore, rehearsal was appeared as the age of the Korean early childhood increased.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1555-1557
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• 2002

We have investigated the precharge type sense amplifier, it is suitable fur voltage sensing in a NOR type single transistor ferroelectric field effect transistor (1T FeFET) memory read operation. The proposed precharge type sense amplifier senses the bit line voltage of 1T FeFET memory. Therefore, the reference celt is not necessary compared to current sensing in 1T FeFET memory, The high noise margin is wider than the low noise margin in the first inverter because requires tile output of precharge type sense amplifier high sensitivity to transition of input signal. The precharge type sense amplifier has very simple structure and can sense the bit line signal of the 1T FeFET memory cell at low voltage.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.904-906
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• 2009

Organic field-effect transistor (OFET) memory is an emerging device for its potential to realize light-weight, low cost flexible charge storage media. Here we report on a solution-processed poly[9,9-dioctylfluorenyl-2,7-diyl]-co-(bithiophene)] (F8T2) nano floating-gate memory (NFGM) with top-gate/bottom-contact device configuration. A reversible shift in the threshold voltage ($V_{Th}$) and the reliable memory characteristics were achieved by incorporation of thin Au nanoparticles (NPs) as charge storage sites for negative electrons at the interface between polystyrene and cross-linked poly(4-vinylphenol).