• Title/Summary/Keyword: Memory Saving

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Development of Heat Control Valve Using SMA and Remote Controller for House Heating System (형상기억합금을 이용한 난방용 온도조절 밸브 및 원격 제어장치 개발)

  • Choi, Jeongju;Yeom, Jeongkuk
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.9 no.2
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    • pp.6-11
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    • 2010
  • For the purpose of reducing the energy consumption in the house heating, the various devices have been developed. One of these is to control the flow in the heat pipe and the flow control valve using shape memory alloy(SMA) spring is proposed in our study. The proposed house heating system is to save the gas consumption and the remote control system is designed for the convenience of using the proposed valve. The developed valve consists of SMA spring, disk, return spring, and regulation handle. The regulation handle is for supplying the additional hot water and is controlled by remote-control-motor. In order to design the remote control system, the Zigbee wireless communication protocol is used. The performance of the proposed valve structure is shown through the experimental result.

A Study of Spectral Domain Electromagnetic Scattering Analysis Applying Wavelet Transform (웨이블릿을 이용한 파수영역 전자파 산란 해석법 연구)

  • 빈영부;주세훈;이정흠;김형동
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.3
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    • pp.337-344
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    • 2000
  • The wavelet analysis technique is applied in the spectral domain to efficiently represent the multi-scale features of the impedance matrices. In this scheme, the 2-D quadtree decomposition (applying the wavelet transform to only the part of the matrix) method often used in image processing area is applied for a sparse moment matrix. CG(Conjugate-Gradient) method is also applied for saving memory and computation time of wavelet transformed moment matrix. Numerical examples show that for rectangular cylinder case the non-zero elements of the transformed moment matrix grows only as O($N^{1.6}$).

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A Study on Sensorless Control of PMSM using Sliding Mode Observer in high speed range (슬라이딩 모드 관측기를 이용한 고속 영역에서의 PMSM 센서리스 제어에 관한 연구)

  • Kang K.L.;Kim Jang-Mok;Lee S.H.;Hwag K.B.;Kim K.H.
    • Proceedings of the KIPE Conference
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    • 2003.07b
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    • pp.745-749
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    • 2003
  • The iterative sliding mode observer is proposed to control sensorless PMSM(Permanent Magnet Synchronous Motor). Proposed sliding mode observer has the character which is robust to the disturbance and parameter variation. Low pass filter with the variable cutoff frequency is also proposed to compensate rotor angle, it is led to saving memory and minimizing operation time. Experimental results shows that the proposed sliding mode observer leads to the proper performance.

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An Approximate DRAM Architecture for Energy-efficient Deep Learning

  • Nguyen, Duy Thanh;Chang, Ik-Joon
    • Journal of Semiconductor Engineering
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    • v.1 no.1
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    • pp.31-37
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    • 2020
  • We present an approximate DRAM architecture for energy-efficient deep learning. Our key premise is that by bounding memory errors to non-critical information, we can significantly reduce DRAM refresh energy without compromising recognition accuracy of deep neural networks. To validate the key premise, we make extensive Monte-Carlo simulations for several well-known convolutional neural networks such as LeNet, ConvNet and AlexNet with the input of MINIST, CIFAR-10, and ImageNet, respectively. We assume that the highest-order 8-bits (in single precision) and 4-bits (in half precision) are protected from retention errors under the proposed architecture and then, randomly inject bit-errors to unprotected bits with various bit-error-rates. Here, recognition accuracies of the above convolutional neural networks are successfully maintained up to the 10-5-order bit-error-rate. We simulate DRAM energy during inference of the above convolutional neural networks, where the proposed architecture shows the possibility of considerable energy saving up to 10 ~ 37.5% of total DRAM energy.

The Design of Algorithm for Saving the Real-time Data Using Microprocessor (원칩마이컴을 이용한 실시간 데이터 저장을 위한 알고리즘 설계)

  • Shin Sa-Hyun;Kim Ki-Bum;Cho Geum-Bae;Baek Hyung-Lae;Seo Jin-Youn;Choi Nak-Il
    • Proceedings of the KIPE Conference
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    • 2001.07a
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    • pp.657-661
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    • 2001
  • In This paper describes on the development of detecting power using Microprocessor. The detecting power system is composed of main controller system and analyzing software. Re system detected voltage, current, temperature, leakage current md its saved in ROM. This system applies the 'AT89C52' to CPU and 'AM29F040B' used a memory to sue the data.

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Input Module for Levelling Data (수준측량자료 입력모듈)

  • 이석찬;이창경;최병길
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.7 no.2
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    • pp.21-26
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    • 1989
  • This module to input Korean Level Data has 4 capacities of inputing, deleting, referencing and saving. Data file of level line consists of sorted list of node on the basis of “ABSTRACT”. For easy work, interactive method was employed. As the result of removing the boring routine by applying the characteristics of level data, working efficiency was increased. This program was written in C-language and runs on a minimum hardware configuration of IBM PC/XT with 640KB memory, In the future, these unit modules combine to form Generalized Level Information System.

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A Study on Nonlinear Partial Simulation of Spatial Structure Using Rigid Replacement Method of Boundary (경계부 강성 치환 기법을 이용한 대공간 구조물의 부분 비선형 시뮬레이션에 관한 연구)

  • Kim, Seung-Deog;Jung, Hye-Won
    • Journal of Korean Association for Spatial Structures
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    • v.19 no.2
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    • pp.17-25
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    • 2019
  • In this study, we propose a new scheme of nonlinear analysis for Incheon International Airport Terminal-2 which was opened on January of 2018 for the Olympic Winter Games of PyeongChang in South Korea. The terminal was built by a single layered irregular space frame. It has hard problems for nonlinear analysis geometrically, because of a limitation of personal computer's ability by the number of rigid joints in the roof. Therefore we attempt easier approach to be chosen a center part of the roof instead of the whole structure, and to substitute the other boundary parts as springs. The scheme shows some merits for saving memory and calculation time and so on.

Clocked Low Power Rail-to-Rail Sense Amplifier for Ternary Content Addressable Memory (TCAM) Application (Ternary Content Addressable Memory를 위한 저 전력 Rail-to-Rail 감지 증폭기)

  • Ahn, Sang-Wook;Jung, Chang-Min;Lim, Chul-Seung;Lee, Soon-Young;Baeg, Sang-Hyeon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.2
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    • pp.39-46
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    • 2012
  • The newly designed sense amplifier in this paper has rail-to-rail input range achieving low power consumption. Reducing static power consumption generated due to DC path to ground is key element for low power consumption in this paper. The proposed sense amplifier performs power-saving operation using negative feedback circuit that controls the current flow with the newly added PMOS input terminal. As a simulation result, the proposed sense amplifier consumed about over 50 % efficiency of the average power consumed by the typical Rail-to-Rail sense amplifier.

A Simple Toeplitz Channel Matrix Decomposition with Vectorization Technique for Large scaled MIMO System (벡터화 기술을 이용한 대규모 MIMO 시스템의 간단한 Toeplitz 채널 행렬 분해)

  • Park, Ju Yong;Hanif, Mohammad Abu;Kim, Jeong Su;Song, Sang Seob;Lee, Moon Ho
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.9
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    • pp.21-29
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    • 2014
  • Due to enormous number of user and limited memory space, the memory saving is become an important issue for big data service these days. In the large scaled multiple-input multiple-output (MIMO) system, the Teoplitz channel can play the significance rule to improve the performance as well as power efficiency. In this paper, we propose a Toeplitz channel decomposition based on matrix vectorization. Here we use Toeplitz matrix to the channel for large scaled MIMO system. And we show that the Toeplitz Jacket matrices are decomposed to Cooley-Tukey sparse matrices like fast Fourier transform (FFT).

Bit Operation Optimization and DNN Application using GPU Acceleration (GPU 가속기를 통한 비트 연산 최적화 및 DNN 응용)

  • Kim, Sang Hyeok;Lee, Jae Heung
    • Journal of IKEEE
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    • v.23 no.4
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    • pp.1314-1320
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    • 2019
  • In this paper, we propose a new method for optimizing bit operations and applying them to DNN(Deep Neural Network) in software environment. As a method for this, we propose a packing function for bitwise optimization and a masking matrix multiplication operation for application to DNN. The packing function converts 32-bit real value to 2-bit quantization value through threshold comparison operation. When this sequence is over, four 32-bit real values are changed to one 8-bit value. The masking matrix multiplication operation consists of a special operation for multiplying the packed weight value with the normal input value. And each operation was then processed in parallel using a GPU accelerator. As a result of this experiment, memory saved about 16 times than 32-bit DNN Model. Nevertheless, the accuracy was within 1%, similar to the 32-bit model.