• Electronics and Telecommunications Trends
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• v.35 no.3
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• pp.55-65
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• 2020

With the development of nonvolatile memory technology, Intel has released the Optane datacenter persistent memory module (DCPMM) that can be deployed in the dual in-line memory module. The results of research and experiments on Optane DCPMMs are significantly different from the anticipated results in previous studies through emulation. The DCPMM can be used in two different modes, namely, memory mode (similar to volatile DRAM: Dynamic Random Access Memory) and app direct mode (similar to file storage). It has buffers in 256-byte granularity; this is four times the CPU (Central Processing Unit) cache line (i.e., 64 bytes). However, these properties are not easy to use correctly, and the incorrect use of these properties may result in performance degradation. Optane has the same characteristics of DRAM and storage devices. To take advantage of the performance characteristics of this device, operating systems and applications require new approaches. However, this change in computing environments will require a significant number of researches in the future.

• IEMEK Journal of Embedded Systems and Applications
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• v.12 no.3
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• pp.177-184
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• 2017

High performance non-volatile memory system can mitigate the gap between main memory and storage. However, no single memory devices fulfill the requirements. Non-volatile Dual In-line Memory Module (NVDIMM) consisted of DRAMs and NAND Flashes has been proposed to achieve the performance and non-volatility simultaneously. When power outage occurs, data in DRAM is backed up into NAND Flash using a small-size external energy storage such as a supercapacitor. Backup and restore operations of NVDIMM do not cooperate with the operating system in the NVDIMM standard, thus there is room to optimize its operation. This paper analysis the operation of NVDIMM and proposes a method to reduce backup and restore time. Particularly, data compression is introduced to reduce the amount of data that to be backed up and restored. The simulation results show that the proposed method reduces up to 72.6% of backup and restore time.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.264-267
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• 2002

This paper proposed a effective priority selection algorithm named weighted round-robin algorithm and show the implementation result of DMAC priority selection module using prosed weighted round-robin algorithm. I parameterize timing constraints of each functional module, which decide the effectiveness of system. Proposed weighted round-robin algorithm decide the most effective module for data transmission using parameterize timing constraints and update timing parameter of each module for next transmission module selection. I implement DMAC priority selection module using this weighted round-robin algorithm and can improve the timing effective for data transmission from memory to functional module or one functional module to another functional module.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.4
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• pp.362-369
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• 2018

In this paper, we propose a procedure to multiple SNS channels automatic streaming through multiple output channels including the output channel of an external streaming server. The multiple SNS channels automatic streaming server includes an output management module for controlling the transmission of video contents to RELAY module that establish two or more output channels. In this paper, we experimented by separate with HD and FHD video using RELAY module in multiple SNS channel automatic streaming. In stream modules using RELAY module of HD video, when the publisher client and the player client and the RELAY module are 1 channel, the occupancy rate of CPU is 0.6% and the occupancy rate of heap memory is 0.3%(20 Mbyte). When the publisher client and the player client and the RELAY module are 183 channels, the occupancy rate of CPU is 99.9% and the occupancy rate of heap memory is 45.8%(3.7Gbyte). Therefore, the paper is not limited to the size of the streaming server by extending the output channel from which the video is transmitted to the output channel of the external streaming server. And a process of allocating an output channel of an external streaming server to an output channel through which an video is transmitted can be easily performed, so that an efficient output channel management can be performed even when a plurality of videos are transmitted.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.5
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• pp.539-548
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• 2015

In this paper, shared memory feature was developed in multi-core system with different OS for different processor-specific bus, while conducting an experiment on shared memory feature between the two processors based on embedded Linux system. For the purpose of developing shared memory in dual bus structure, memory controller was used, while managing shared memory segment through list data structure. For AMP multi-core test, Linux OS was installed in 2 processor cores. In addition, it verified the creation and use of shared memory by using kernel module implemented to test shared memory.

• Proceedings of the IEEK Conference
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• 2003.11a
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• pp.513-516
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• 2003

Current paper introduces the additional multimedia module for digital TV. The module is developed for displaying the image captured by digital still camera, camcorder, or PC in the digital TV. For these purpose, the module has the interface circuit for accessing five media type of memory cards. It decodes JPEG, BMP, or TIFF image data saved in the memory card and converts the image data to analog RGB signal. It also supports three types of output image size from HD to WXGA resolution. So the introduced module could be adopted In the most of digital TV.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.8
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• pp.1831-1839
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• 2003

This paper suggests Enode Operating Systems that is core part of active network. It iscomposed of five parts: domain, channel, thread, memory and file module. The domain and channel module among five parts are the main function. The remaining parts that are the thread, memory, and file are the supporting module for the domain and channel. The domain module manages active network It creates and deletes domain data structure. The channel module has an inchan, outchan, and cutchan. We also test the Enode Operating Systems to verify suggesting concept of node Operating System.

• 제어로봇시스템학회:학술대회논문집
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• 1989.10a
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• pp.711-714
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• 1989

Autonomous mobile robot Yamabico and his newly developed ultrasonic range finding module(URF) are described. Yamabico is a self-contained autonomous robot for in-door environment. It has a modularized architecture, which consists of master module, ultrasonic range finding module, locomotion module, voice synthesizer module and console. Newly developed ultrasonic range finding module has a 68000 processor and Dual-port memory for communication. It controls the ultrasonic transmitters and receivers and calculate the range distances for 12-direction, simultaneously within every 60 milliseconds.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.4 no.4
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• pp.372-379
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• 2003

In order to improve a damage of connection part of Main Board Memory, we developed a hazard extension card(Socket Jig). The damage occurs during the test of the memory module product of the Desktop-PC. The connection part of main board was broken by 15％ per a day before the development. There existed two major problems; One was that we must obtain more than 15％ of surplus equipment. while the other was that we needed people who were wholly responsible for repair. The development of extension card decreased operation delay. Besides, it improved capacity of surplus equipment and operation efficiency. Therefore, we can save 78,000,000 won per year.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.3
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• pp.89-99
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• 1995

In this paper, we ecamined the effect that MCM-L technique influencess on the design and fabrication of multichip memory modules in increasing the packing desity of memory capacity and maximizing its electrical characteristics. For that purpose, we examined the effective methods of reducing the area of module layout and the wiring length with the variation of chip allocation and the number of wiring layers. We fabricated a 256K${\times}$8bit SRAM module with eight 32K${\times}$8bit SRAM chips. The routing experiment showed that we could optimize the area of module layout and wiring length by placing chips in a row, arranging module I/O pads parallel to chip I/O pads, and equalizing the number of terminal sides of module I/O's to that of chip I/O's. The routing was optimized when we used three wire layers in case of one sided chip mounting or five wire layers in case of double sided chip mounting. The fabricated modules showed 18.9 cm/cm$^{2}$ in wiring density, 65 % in substrate occupancy efficiency, and module substrate and functionally tested to find out the module working perfectly.