• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2010.06a
• /
• pp.345-345
• /
• 2010

1T-DRAM cell with solid phase (SPC) crystallized poly-Si thin film transistor was fabricated and electrical characteristics were evaluated. The fabricated device showed kink effect by negative back bias. Kink current is due to the floating body effect and it can be used to memory operation. Current difference between "1" state and "0" state was defined and the memory properties can be improved by using gate induced drain leakage (GIDL) current.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.16 no.1
• /
• pp.80-90
• /
• 2016

Thanks to superior leakage energy efficiency compared to SRAM cells, STTRAM cells are considered as a promising alternative for a memory element in on-chip caches. However, the main disadvantage of STTRAM cells is high write energy and latency. In this paper, we propose a low-cost write filter (WF) cache which resides between the load/store queue and STTRAM-based L1 data cache. To maximize efficiency of the WF cache, the line allocation and access policies are optimized for reducing energy consumption of STTRAM-based L1 data cache. By efficiently filtering the write operations in the STTRAM-based L1 data cache, our proposed WF cache reduces energy consumption of the STTRAM-based L1 data cache by up to 43.0% compared to the case without the WF cache. In addition, thanks to the fast hit latency of the WF cache, it slightly improves performance by 0.2%.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.58 no.12
• /
• pp.2420-2424
• /
• 2009

We have successfully demonstrated of metal-insulator-semiconductor (MIS) capacitors with $Al_2O_3/p-Si$ structures. The $Al_2O_3$ film was grown at $200^{\circ}C$ on H-terminated Si wafer by atomic layer deposition (ALD) system. Trimethylaluminum [$Al(CH_3)_3$, TMA] and $H_2O$ were used as the aluminum and oxygen sources. A cycle of the deposition process consisted of 0.1 s of TMA pulse, 10 s of $N_2$ purge, 0.1 s of $H_2O$ pulse, and 60 s of $N_2$ purge. The 5 nm thick $Al_2O_3$ layer prepared on Si substrate by ALD exhibited excellent electrical properties, including low leakage currents, no mobile charges, and a good interface with Si.

• Journal of Advanced Marine Engineering and Technology
• /
• v.30 no.8
• /
• pp.927-933
• /
• 2006

The structural and electrical characteristics of PLZT thin films fabricated onto $Pt/IrO_2/Ir/Ti/SiO_2/Si$ substrates by a pulsed laser deposition were investigated to develop the high dielectric thin films for capacitor layer of semiconductor memory devices The slim region 14/50/50 PLZT thin films were fabricated by PLD and estimated the characteristics for memory application 14/50/50 PLZT thin films have crystallize into perovskite structure at the $600^{\circ}C$ deposition temperature, 200 mTorr of oxygen pressure, and 2 $J/cm^2$ of laser energy density. In this condition PLZT thin films had the dielectric constant as high as 985, storage charge density 8.17 ${\mu}C/cm^2$ and charging time 0.20 ns. Leakage current density was less than $10^{-10}A/cm^2$ up to 5 V bias voltage.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.13 no.9
• /
• pp.725-728
• /
• 2000

Ferroelectric thin film capacitors with high dielectric constant are important for the application of memory devices. In this work, We have systematically investigated the variation of grain sizes depending on the process condition of two-step process. Both in-situ annealing and ex-annealing have been compared depending on the annealing time. C-V measurement, ferroelectric properties, leakage current, XRD and SEM were performed to investigate the electircal properties and microstructural properties of Pb(La, Ti)O$_3$ films.

• Proceedings of the Korean Information Science Society Conference
• /
• 2004.04a
• /
• pp.175-177
• /
• 2004

최근 임베디드 시스템 분야에서의 실시간 운영체제는 정보가전을 비롯한 임베디드 시스템 등 적용범위가 점차 확대되는 추세이다. 실시간 운영체제는 다른 범용 운영체제와는 달리 시간 결정성을 보장하는 운영체제로서, 주로 자원(resource)이 한정된 시스템에 탑재되어야 하기 때문에 효율적인 자원관리가 필요하다. 시스템의 자원 중에서도 메모리는 실시간 운영체제의 실행에 있어서 꼭 필요한 자원이므로 이에 대한 효과적인 관리가 필수적이라 할 수 있다. 대부분 실시간 운영체제에서는 효율적인 메모리 관리를 위해서 동적 메모리 할당 방법을 채택하고 있다. 그러나 할당된 메모리를 해제하지 않고 종료되는 태스크로 인해 메모리 누수 문제가 발생하였다. 본 논문에서는 동적 메모리 할당에서 메모리 누수를 최소화 할 수 있도록 개선한 메모리 관리 기법을 설계 및 구현하였다.

• Proceedings of the Korean Information Science Society Conference
• /
• 2005.07a
• /
• pp.859-861
• /
• 2005

임베디드 시스템은 임베디드 시스템의 공간제약 특성과 고가의 메모리 가격으로 인하여 한정된 메모리 자원을 가질 수 밖에 없어 메모리 자원의 효율적인 사용 및 관리가 필요하다. 임베디드 시스템에 탑재되는 실시간 운영체제는 위와 같은 특성을 고려하여, CPU 와 함께 운영체제의 중요 자원인 메모리를 효율적으로 관리할 수 있어야 한다. 본 논문에서는 실시간 운영체제에서 메모리 누수 현상을 방지하고 메모리를 보다 효율적으로 관리할 수 있는 메모리 모니터링 기법을 설계 및 구현하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2000.07a
• /
• pp.861-864
• /
• 2000

Ferroelectric thin film capacitors with high dielectric constant are important for the application of memory devices. In this work, thin films of PLT(28)(Pb$\sub$0.72/La$\sub$0.28/Ti$\sub$0.93/O$_3$) were fabricated on Pt/Ti/SiO$_2$/Si substrates in-situ annealing and ex-situ annealing have been compared depending on the annealing time. We have systematically investigated the variation of grain sizes depending on the condition of post-annealing and the variation of deposition rate. C-V measurement, ferroelectric properties, leakage current and SEM were performed to investigate the electrical properties and the microstructural properties of Pb(La,Ti)O$_3$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.15 no.10
• /
• pp.831-837
• /
• 2002

Scaled SONOS transistors have been fabricated by 0.35$\mu\textrm{m}$ CMOS standard logic process. The thickness of stacked ONO(blocking oxide, memory nitride, tunnel oxide) gate insulators measured by TEM are 2.5 nm, 4.0 nm and 2.4 nm, respectively. The SONOS memories have shown low programming voltages of ${\pm}$8.5 V and long-term retention of 10-year Even after 2 ${\times}$ 10$\^$5/ program/erase cycles, the leakage current of unselected transistor in the erased state was low enough that there was no error in read operation and we could distinguish the programmed state from the erased states precisely The tight distribution of the threshold voltages in the programmed and the erased states could remove complex verifying process caused by over-erase in floating gate flash memory, which is one of the main advantages of the charge-trap type devices. A single power supply operation of 3 V and a high endurance of 1${\times}$10$\^$6/ cycles can be realized by the programming method for a flash-erased type EEPROM.

• Journal of electromagnetic engineering and science
• /
• v.9 no.2
• /
• pp.78-84
• /
• 2009

This paper represents the effects of drain bias on the linearity and efficiency of an analog pre-distortion power amplifier(PA) for wideband code division multiple access(WCDMA) repeater applications. For verification, an analog predistorter(APD) with three-branch nonlinear paths for memory-effect compensation is implemented and a class-AB PA is fabricated using a 30-W Si LOMaS. From the measured results, at an average output power of 33 dBm(lO-dB back-off power), the PA with APD shows the adjacent channel leakage ratio(ACLR, ${\pm}$5 MHz offset) of below -45.1 dBc, with a drain efficiency of 24 % at the drain bias voltage($V_{DD}$) of 18 V. This compared an ACLR of -36.7 dEc and drain efficiency of 14.1 % at the $V_{DD}$ of 28 V for a PA without APD.