• Title/Summary/Keyword: Memory Leakage

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An Attack of Defeating Keyboard Encryption Module using Javascript Manipulation in Korean Internet Banking (자바스크립트 변조를 이용한 국내 인터넷 뱅킹 키보드 암호화 모듈 우회 공격)

  • Lee, Sung-hoon;Kim, Seung-hyun;Jeong, Eui-yeob;Choi, Dae-seon;Jin, Seung-hun
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.25 no.4
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    • pp.941-950
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    • 2015
  • Internet banking is widely used in our life with the development of the internet. At the same time, phishing attacks to internet banking have been increased by using malicious object to make unfair profit. People using internet banking service in Korea is required to install security modules such as anti-virus and keyboard protection. However phishing attack technique has been progressed and the advanced technique such as memory hacking defeats the security module of internet banking service. In this paper, we describe internet banking security modules provided by Korean internet banks and analyze how keyboard encryption module works. And we propose an attack to manipulate account transfer information using javascript. Although keyboard protection module provides two functions that protect leakage and manipulation of account transfer information submitted by users against the malicious program of hackers. Our proposed technique can manipulate the account transfer information and result html pages.

Ferroelectric properties of BLT films deposited on $ZrO_2$Si substrates

  • Park, Jun-Seo;Lee, Gwang-Geun;Park, Kwang-Hun;Jeon, Ho-Seung;Im, Jong-Hyun;Park, Byung-Eun;Kim, Chul-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.172-173
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    • 2006
  • Metal-ferroelectric-insulator-semiconductor (MFIS) structures with $Bi_{3.35}La_{0.75}Ti_3O_{12}$ (BLT) ferroelectric film and Zirconium oxide ($ZrO_2$) layer were fabricated on p-type Si(100). $ZrO_2$ and BLT films were prepared by sol-gel technique. Surface morphologies of $ZrO_2$ and BLT film were measured by atomic force microscope (AFM). The electrical characteristics of Au/$ZrO_2$/Si and Au/BLT/$ZrO_2$/Si film were investigated by C-V and I-V measurements. No hysteretic characteristics was observed in the C-V curve of the Au/$ZrO_2$/Si structure. The memory window width m C-V curve of the Au/BLT/$ZrO_2$/Si diode was about 1.3 V for a voltage sweep of ${\pm}5$ V. The leakage current of Au/$ZrO_2$/Si and Au/BLT/$ZrO_2$/Si structures were about $3{\times}10^{-8}$ A at 30 MV/cm and $3{\times}10^{-8}$ A at 3 MV/cm, respectively.

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A Study of Semiconductor Memory Device using a Ferroelectric Material PZT (강유전체 PZT를 이용한 반도체메모리소자에 관한 연구)

  • Jung, Se-Min;Park, Young;Choi, Yu-Shin;Lim, Dong-Gun;Song, Jun-Tae;Yi, Jun-Sin
    • Proceedings of the KIEE Conference
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    • 1998.11c
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    • pp.801-803
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    • 1998
  • We investigated Pt and $RuO_2$ as a bottom electrode and PZT thin film for ferroelectric applications. XRD examination shows that a mixed phase of (111) and (200) Pt peak for the temperature ranged from RT to $200^{\circ}C$, and a preferred (111) orientation for the substrate temperature of $300^{\circ}C$. From the XRD and AFM results, we recommend the substrate temperature of $300^{\circ}C$, 80 W for the Pt bottom electrode growth. From the study of an oxygen partial pressure from 0 to 50%, we learned that only Ru metal was grown with $0{\sim}5%$, a mixed phase of Ru and $RuO_2$ for $10{\sim}40%$, pure $RuO_2$ at 50%. Having optimized the bottom electrode growth conditions, we employed two step process in PZT film capacitor: PZT film growth at the low substrate temperature of $300^{\circ}C$ and then post RTA anneal treatments. PZT films were randomly oriented on $RuO_2$ and (110) preferentially oriented on Pt electrode. Leakage current density of PZT film demonstrated two to three orders higher for $RuO_2$ bottom electrode. From C-V results we observed a dielectric constant of PZT film higher than 1200. This paper presents the optimized process conditions of the bottom electrodes and properties of PZT thin films on these electrodes.

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Properties of MFS capacitors with various gate electrodes using $LiNbO_3$ferroelectric thin film ($LiNbO_3$ 강유전체 박막을 이용한 MFS 커패시터의 게이트 전극 변화에 따른 특성)

  • 정순원;김광호
    • Journal of the Korean Vacuum Society
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    • v.11 no.4
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    • pp.230-234
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    • 2002
  • Metal-ferroelectric-semiconductor(MFS) capacitors by using rapid thermal annealed $LiNbO_3$/Si structures were successfully fabricated and demonstrated nonvolatile memory operations of the MFS capacitors. The C-V characteristics of MFS capacitors showed a hysteresis loop due to the ferroelectric nature of the $LiNbO_3$thin film. The dielectric constant of the $LiNbO_3$film calculated from the capacitance in the accumulation region in the capacitance-voltage(C-V) curve was about 25. The gate leakage current density of MFS capacitor using a platinum electrode showed the least value of $1{\times}10^{-8}\textrm{A/cm}^2$ order at the electric field of 500 kV/cm. The minimum interface trap density around midgap was estimated to be about $10^{11}/cm^2$.eV. The typical measured remnant polarization(2Pr) value was about 1.2 $\mu\textrm{C/cm}^2$, in an applied electric field of $\pm$ 300 kv/cm. The ferroelectric capacitors showed no polarization degradation up to about $10^{10}$ switching cycles when subjected to symmetric bipolar voltage pulse in the 500 kHz.

Android Log Cat Systems Research for Privacy (개인정보보호를 위한 안드로이드 로그캣 시스템 연구)

  • Jang, Hae-Sook
    • Journal of the Korea Society of Computer and Information
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    • v.17 no.11
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    • pp.101-105
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    • 2012
  • Various social problems through violating personal information and privacy are growing with the rapid spread of smartphones. For this reason, variety of researches and technology developments to protect personal information being made. The smartphone, contains almost all of the personal information, can cause data spill at any time. Collecting or analyzing evidence is not an easy job with forensic analyzing tool. Android forensics research has been focused on techniques to collect and analyze data from non-volatile memory but research for volatile data is very slight. Android log is the non-volatile data that can be collected by volatile storage. It is enough to use as a material to track the usage of the Android phone because all of the recent driven records from system to application are stored. In this paper, we propose a method to respond to determining the existence of personal information leakage by filtering logs without forensic analysis tools.

Fabrications and Properties of VF2-TrFE Films for Nonvolatile Memory Application (비휘발성 메모리 응용을 위한 VF2-TrFE 박막의 제작 및 특성)

  • Jeong, Sang-Hyun;Byun, Jung-Hyun;Kim, Hyun-Jun;Kim, Ji-Hun;Kim, Kwang-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.388-388
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    • 2010
  • In this study, Ferroelectric vinylidene fluoride-trifluoroethylene (VF2-TrFE) copolymer films were directly deposited on degenerated Si (n+, $0.002\;{\Omega}{\cdot}cm$) using by spin coating method. A 1~5 wt% diluted solution of purified vinylidene fluoride-trifluoroethylene (VF2:TrFE = 70:30) in a dimethylformamide (DMF) solvent were prepared and deposited on silicon wafers at a spin rate of 2000 ~ 4000 rpm for 2 ~ 30 seconds. After annealing in a vacuum ambient at 100 ~ $200^{\circ}C$ for 60 min, upper aluminum electrodes were deposited by vacuum evaporation for electrical measurement. X-ray diffraction results showed that the VF2-TrFE films on Si substrates had $\beta$-phase of copolymer structures. The capacitance on highly doped Si wafer showed hysteresis behavior like a butterfly shape and this result indicates clearly that the copolymer films have ferroelectric properties. The typical measured remnant polarization ($P_r$) and coercive filed ($E_c$) values were about $5.7\;{\mu}C/cm^2$ and 710 kV/em, respectively, in an applied electric field of ${\pm}$ 1.5 MV/em. The gate leakage current densities measured at room temperature was less than $7{\times}10^{-7}\; A/cm^2$ under a field of 1 MV/cm.

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Finite Element Modeling of Perturbation Fields due to Colonies of Stress Corrosion Cracks(SCCs) in a Gas Transmission Pipeline (가스공급배관에서 응력부식균열 군에 의해 교란된 자속의 유한요소 모델링)

  • Yang, Sun-Ho
    • Journal of the Korean Society for Nondestructive Testing
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    • v.21 no.5
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    • pp.493-500
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    • 2001
  • The detection of axial cracks using conventional MFL pig is a significant challenge in the gas pipeline inspection. In this study, a technique using interaction of circumferentially induced torrents with axial stress corrosion crack is presented. The feasibility of this technique is investigated using finite element modeling. Finite element analysis of such interaction is a difficult problem in terms of both computation time and memory requirements. The challenges arise due to the nonlinearity of material properties, the small sire of tight cracks relative to that of the magnetizer, and also time stepping involved in modeling velocity effects. This paper presents an approach based on perturbation methods. The overall analysis procedure is divided into 4 simple steps that can be performed sequentially. Modeling results show that this technique can effectively detect colonies of SCC as well as single SCC.

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1 Selector + 1 Resistance Behavior Observed in Pt/SiN/Ti/Si Structure Resistive Switching Memory Cells

  • Park, Ju-Hyeon;Kim, Hui-Dong;Kim, Tae-Geun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.307-307
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    • 2014
  • 정보화 시대로 접어들면서 동일한 공간에 더 많은 정보를 저장할 수 있고, 보다 빠른 동작이 가능한 비휘발성 메모리 소자에 대한 요구가 증가하고 있다. 하지만, 최근 비휘발성 메모리 소자 관련 연구보고에 따르면, 메모리 소자의 소형화 및 직접화 측면에서, 전하 저장을 기반으로 하는 기존의 Floating-Gate(FG) Flash 메모리는 20 nm 이하 공정에서 한계가 예측 되고 있다. 따라서, 이러한 FG Flash 메모리의 한계를 해결하기 위해, 기존에 FET 기반의 FG Flash 구조와 같은 3 terminal이 아닌, Diode와 같은 2 terminal로 동작이 가능한 ReRAM, PRAM, STT-MRAM, PoRAM 등 저항변화를 기반으로 하는 다양한 종류의 차세대 메모리 소자가 연구되고 있다. 그 중, 저항 변화 메모리(ReRAM)는 CMOS 공정 호환성, 3D 직접도, 낮은 소비전력과 빠른 동작 속도 등의 우수한 동작 특성을 가져 차세대 비휘발성 메모리로 주목을 받고 있다. 또한, 상하부 전극의 2 terminal 만으로 소자 구동이 가능하기 때문에 Passive Crossbar-Array(CBA)로 적용하여 플래시 메모리를 대체할 수 있는 유력한 차세대 메모리 소자이다. 하지만, 이를 현실화하기 위해서는 Passive CBA 구조에서 발생할 수 있는 Read Disturb 현상, 즉 Word-Line과 Bit-Line을 통해 선택된 소자를 제외하고 주변의 다른 소자를 통해 흐르는 Sneak Leakage Current(SLC)를 차단하여 소자의 메모리 State를 정확히 sensing하기 위한 연구가 선행 되어야 한다. 따라서, 현재 이러한 이슈를 해결하기 위해서, 많은 연구 그룹에서 Diodes, Threshold Switches와 같은 ReRAM에 Selector 소자를 추가하는 방법, 또는 Self-Rectifying 특성 및 CRS 특성을 보이는 ReRAM 구조를 제안 하여 SLC를 차단하고자 하는 연구가 시도 되고 있지만, 아직까지 기초연구 단계로서 아이디어에 대한 가능성 정도만 보고되고 있는 현실 이다. 이에 본 논문은 Passive CBA구조에서 발생하는 SLC를 해결하기 위한 새로운 아이디어로써, 본 연구 그룹에서 선행 연구로 확보된 안정적인 저항변화 물질인 SiN를 정류 특성을 가지는 n-Si/Ti 기반의 Schottky Diode와 결합함으로써 기존의 CBA 메모리의 Read 동작에서 발생하는 SLC를 차단 할 수 있는 1SD-1R 구조의 메모리 구조를 제작 하였으며, 본 연구 결과 기존에 문제가 되었던 SLC를 차단 할 수 있었다.

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The Implemention of RTD-l000A based on ARM Microcontroller (ARM 마이크로컨트롤러 기반 RTD-1000A의 구현)

  • Kim, Min-Ho;Hong, In-Sik
    • Journal of Internet Computing and Services
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    • v.9 no.6
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    • pp.117-125
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    • 2008
  • With increase of concern about the Ubiquitous application, the necessity of the computer system which is miniaturized is becoming larger. The ARM processor is showing a high share from embedded system market. In this paper, ideal method for RTD-1000 controller construction and development is described using ARM microcontroller. Existing RTD-1000 measures distance of disconnection or defect of sensing casket by measuring receiving reflected wave which was sent via copper wire inside the leaking sensing rod. Using this RTD-1000, leakage and breakage of water and oil pipe can be sensed and it reports damage results to the networks. But, existing RTD-1000 wastes hardware resources much and costs a great deal to installation. Also, it needs a cooling device because the heating problem, and has some problem of the secondary memory unit such as the hard disk. So, long tenn maintenance has some problems in the outside install place. In this paper, for the resolving the problem of RTD-1000, RTD-1000A embedded system based on ARM is proposed and simulated.

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Characterization of Electrical Properties of Si Nanocrystals Embedded in a SiO$_{2}$ Layer by Scanning Probe Microscopy (Scanning Probe Microscopy를 이용한 국소영역에서의 실리콘 나노크리스탈의 전기적 특성 분석)

  • Kim, Jung-Min;Her, Hyun-Jung;Kang, Chi-Jung;Kim, Yong-Sang
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.54 no.10
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    • pp.438-442
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    • 2005
  • Si nanocrystal (Si NC) memory device has several advantages such as better retention, lower operating voltage, reduced punch-through and consequently a smaller cell area, suppressed leakage current. However, the physical and electrical reasons for this behavior are not completely understood but could be related to interface states of Si NCs. In order to find out this effect, we characterized electrical properties of Si NCs embedded in a SiO$_{2}$ layer by scanning probe microscopy (SPM). The Si NCs were generated by the laser ablation method with compressed Si powder and followed by a sharpening oxidation. In this step Si NCs are capped with a thin oxide layer with the thickness of 1$\~$2 nm for isolation and the size control. The size of 51 NCs is in the range of 10$\~$50 m and the density around 10$^{11}$/cm$^{2}$ It also affects the interface states of Si NCs, resulting in the change of electrical properties. Using a conducting tip, the charge was injected directly into each Si NC, and the image contrast change and dC/dV curve shift due to the trapped charges were monitored. The results were compared with C-V characteristics of the conventional MOS capacitor structure.