• Title/Summary/Keyword: Memory Device Manufacturing

Search Result 37, Processing Time 0.025 seconds

Workpiece-Chucking Device Using Two-Way Shape Memory Alloys: Feasibility Test (양방향성 형상기억합금을 이용한 공작물 척킹장치: 유용성 검증)

  • Shin, Woo-Cheol;Ro, Seung-Kook;Park, Jong-Kweon
    • Journal of the Korean Society of Manufacturing Technology Engineers
    • /
    • v.18 no.5
    • /
    • pp.462-468
    • /
    • 2009
  • In this study, a workpiece-chucking device that generates a chucking force from a shape memory alloy is introduced. This paper first presents train procedure to transform a commercial one-way shape memory alloy into a two-way shape memory alloy, which makes unclamping mechanism of the chucking device simpler than that using the one-way shape memory alloy Second, it describes a conceptual design of the workpiece-chucking device using the two-way type shape memory alloy. Third, it presents a prototype and its chucking characteristics, such as time-response of clamping/unclamping operations and a relationship between temperatures and chucking forces. Finally, it describes a mill-machining test conducted with the prototype. The results confirm that the proposed workpiece-chucking device is feasible for micro machine-tools.

  • PDF

Research Trend of High Aspect Ratio Contact Etching used in Semiconductor Memory Device Manufacturing (반도체 메모리 소자 제조에서 High Aspect Ratio Contact 식각 연구 동향)

  • Hyun-Woo Tak;Myeong-Ho Park;Jun-Soo Lee;Chan-Hyuk Choi;Bong-Sun Kim;Jun-Ki Jang;Eun-Koo Kim;Dong-Woo Kim;Geun-Young Yeom
    • Journal of the Korean institute of surface engineering
    • /
    • v.57 no.3
    • /
    • pp.165-178
    • /
    • 2024
  • In semiconductor memory device manufacturing, the capability for high aspect ratio contact (HARC) etching determines the density of memory device. Given that there is no standardized definition of "high" in high aspect ratio, it is crucial to continuously monitor recent technology trends to address technological gaps. Not only semiconductor memory manufacturing companies such as Samsung Electronics, SK Hynix, and Micron but also semiconductor manufacturing equipment companies such as Lam Research, Applied Materials, Tokyo Electron, and SEMES release annual reports on HARC etching technology. Although there is a gap in technological focus between semiconductor mass production environments and various research institutes, the results from these institutes significantly contribute by demonstrating fundamental mechanisms with empirical evidence, often in collaboration with industry researchers. This paper reviews recent studies on HARC etching and the study of dielectric etching in various technologies.

Implementation of the rotating tool clamping device using a shape memory alloy (형상기억합금을 이용한 회전공구 클램핑 장치 구현)

  • Chung, J.M.;Park, J.K.;Lee, D.J.;Shin, W.C.
    • Transactions of the Korean Society of Machine Tool Engineers
    • /
    • v.17 no.1
    • /
    • pp.16-20
    • /
    • 2008
  • This paper presents the construction of micro tool clamping device using a Ni-Ti shape memory alloy(SMA) ring. Clamping force of the device is produced by elastic force of the SMA reverted to its original shape in normal temperature. Phase transformation of the SMA was realized by temperature control using a peltier element. Prototype of the SMA tool clamping device was fabricated and examined its clamping force and clamping/unclamping operation.

Investigation for Clamping Properties of the Tool Clamping Device Based on the Shape Memory Alloy for Application of a Micro Spindle System (소형 스핀들 시스템 적용을 위한 형상기억합금 기반 공구 클램핑 장치의 체결특성 고찰)

  • Shin, Woo-Cheol;Ro, Seung-Kook;Park, Jong-Kweon;Lee, Deug-Woo;Chung, Jun-Mo
    • Transactions of the Korean Society of Machine Tool Engineers
    • /
    • v.16 no.6
    • /
    • pp.9-14
    • /
    • 2007
  • In this paper, a rotating tool clamping device was developed based on a shape memory alloy(SMA) and its feasibility as a tool holder was experimentally explored. The SMA-based device was able to alter clamping to unclamping through temperature control within 1 second. The means and repeatability(${\sigma}$) of the tool clamping force were 185.5N and 6N respectively and its drifts were less than 3% for an hour. Considering the temperature hysteresis of the SMA-based tool clamping device, it is necessary to heat the SMA ring to around $50^{\circ}C$ after tool change to obtain more clamping force.

Novel Design Methodology using Automated Model Parameter Generation by Virtual Device Fabrication

  • Lee Jun-Ha;Lee Hoong-Joo
    • KIEE International Transactions on Electrophysics and Applications
    • /
    • v.5C no.1
    • /
    • pp.14-17
    • /
    • 2005
  • In this paper, an automated methodology for generating model parameters considering real manufacturing processes is presented with verified results. In addition, the outcomes of applications to the next generation of flash memory devices using the parameters calibrated from the process specification decision are analyzed. The test vehicle is replaced with a well-calibrated TCAD simulation. First, the calibration methodology is introduced and tested for a flash memory device. The calibration errors are less than 5% of a full chip operation, which is acceptable to designers. The results of the calibration are then used to predict the I-V curves and the model parameters of various transistors for the design of flash devices.

Through Silicon Stack (TSS) Assembly for Wide IO Memory to Logic Devices Integration and Its Signal Integrity Challenges

  • Shin, Jaemin;Kim, Dong Wook
    • The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.24 no.2
    • /
    • pp.51-57
    • /
    • 2013
  • The current expanding mobile markets incessantly demands small form factor, low power consumption and high aggregate throughput for silicon-level integration such as memory to logic system. One of emerging solution for meeting this high market demand is 3D through silicon stacking (TSS) technology. Main challenges to bring 3D TSS technology to the volume production level are establishing a cost effective supply chain and building a reliable manufacturing processes. In addition, this technology inherently help increase number of IOs and shorten interconnect length. With those benefits, however, potential signal and power integrity risks are also elevated; increase in PDN inductance, channel loss on substrate, crosstalk and parasitic capacitance. This paper will report recent progress of wide IO memory to high count TSV logic device assembly development work. 28 nm node TSV test vehicles were fabricated by the foundry and assembled. Successful integration of memory wide IO chip with less than a millimeter package thickness form factor was achieved. For this successful integration, we discussed potential signal and power integrity challenges. This report demonstrated functional wide IO memory to 28 nm logic device assembly using 3D package architecture with such a thin form factor.

LSTM Model-based Prediction of the Variations in Load Power Data from Industrial Manufacturing Machines

  • Rita, Rijayanti;Kyohong, Jin;Mintae, Hwang
    • Journal of information and communication convergence engineering
    • /
    • v.20 no.4
    • /
    • pp.295-302
    • /
    • 2022
  • This paper contains the development of a smart power device designed to collect load power data from industrial manufacturing machines, predict future variations in load power data, and detect abnormal data in advance by applying a machine learning-based prediction algorithm. The proposed load power data prediction model is implemented using a Long Short-Term Memory (LSTM) algorithm with high accuracy and relatively low complexity. The Flask and REST API are used to provide prediction results to users in a graphical interface. In addition, we present the results of experiments conducted to evaluate the performance of the proposed approach, which show that our model exhibited the highest accuracy compared with Multilayer Perceptron (MLP), Random Forest (RF), and Support Vector Machine (SVM) models. Moreover, we expect our method's accuracy could be improved by further optimizing the hyperparameter values and training the model for a longer period of time using a larger amount of data.

Convergence Study on Fabrication and Plasma Module Process Technology of ReRAM Device for Neuromorphic Based (뉴로모픽 기반의 저항 변화 메모리 소자 제작 및 플라즈마 모듈 적용 공정기술에 관한 융합 연구)

  • Kim, Geunho;Shin, Dongkyun;Lee, Dong-Ju;Kim, Eundo
    • Journal of the Korea Convergence Society
    • /
    • v.11 no.10
    • /
    • pp.1-7
    • /
    • 2020
  • The manufacturing process of the resistive variable memory device, which is the based of neuromorphic device, maintained the continuity of vacuum process and applied plasma module suitable for the production of the ReRAM(resistive random access memory) and process technology for the neuromorphic computing, which ensures high integrated and high reliability. The ReRAM device of the oxide thin-film applied to the plasma module was fabricated, and research to improve the properties of the device was conducted through various experiments through changes in materials and process methods. ReRAM device based on TiO2/TiOx of oxide thin-film using plasma module was completed. Crystallinity measured by XRD rutile, HRS:LRS current value is 2.99 × 103 ratio or higher, driving voltage was measured using a semiconductor parameter, and it was confirmed that it can be driven at low voltage of 0.3 V or less. It was possible to fabricate a neuromorphic ReRAM device using oxygen gas in a previously developed plasma module, and TiOx thin-films were deposited to confirm performance.

A Design of Integrated Manufacturing System for Compound Semiconductor Fabrication (화합물 반도체 공장의 통합생산시스템 설계에 관한 연구)

  • 이승우;박지훈;이화기
    • Journal of Korean Society of Industrial and Systems Engineering
    • /
    • v.26 no.3
    • /
    • pp.67-73
    • /
    • 2003
  • Manufacturing technologies of compound semiconductor are similar to the process of memory device, but management technology of manufacturing process for compound semiconductor is not enough developed. Semiconductor manufacturing environment also has been emerged as mass customization and open foundry service so integrated manufacturing system is needed. In this study we design the integrated manufacturing system for compound semiconductor fabrication t hat has monitoring of process, reduction of lead-time, obedience of due-dates and so on. This study presents integrated manufacturing system having database system that based on web and data acquisition system. And we will implement them in the actual compound semiconductor fabrication.

The Machining Characteristics of Groove Patterning for Nitinol Shape Memory Alloy Using Electrochemical Machining (전해가공을 이용한 Nitinol 형상기억합금의 그루브 패턴 가공특성에 관한 연구)

  • Shin, Tae-Hee;Kim, Baek-Kyoum;Baek, Seung-Yub;Lee, Eun-Sang
    • Journal of the Korean Society of Manufacturing Technology Engineers
    • /
    • v.18 no.6
    • /
    • pp.551-557
    • /
    • 2009
  • A development of smart materials is becoming a prominent issue on present industries. A smart material, included in functions, is needed for micro fabrication. A shape memory alloy(SMA) in a smart material is best known material. Ni-Ti alloy, composed of nikel and titanium is one of the best shape memory alloy(SMA). Nitinol SMA is used for a lot of high tech industry such as aero space, medical device, micro actuator, sensor system. However, Ni-Ti SMA is difficult to process to make a shape and fabrications as traditional machining process. Because nitinol SMA, that is contained nikel content more than titanium content, has similar physical characteristics of titanium. In this paper, the characteristics of ECM grooving process for nitinol SMA are investigated by experiments. The experiments in this study are progressed for power, gap distance and machining time. The characteristics are found each part. Fine shape in work piece can be found on conditions; current 6A, duty factor 50%, gap distance 15%, gap distance $15{\mu}m$, machining time 10min.

  • PDF