KIEE International Transactions on Electrophysics and Applications

대한전기학회 (The Korean Institute of Electrical Engineers)
권호 표지

Novel Design Methodology using Automated Model Parameter Generation by Virtual Device Fabrication

  • Lee Jun-Ha (Dept. of Computer System Engineering, Sangmyung University) ;
  • Lee Hoong-Joo (Dept. of Computer System Engineering, Sangmyung University)
  • 발행 : 2005.02.01
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초록

In this paper, an automated methodology for generating model parameters considering real manufacturing processes is presented with verified results. In addition, the outcomes of applications to the next generation of flash memory devices using the parameters calibrated from the process specification decision are analyzed. The test vehicle is replaced with a well-calibrated TCAD simulation. First, the calibration methodology is introduced and tested for a flash memory device. The calibration errors are less than 5% of a full chip operation, which is acceptable to designers. The results of the calibration are then used to predict the I-V curves and the model parameters of various transistors for the design of flash devices.

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참고문헌

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