• 마이크로전자및패키징학회지
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• 제20권4호
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• pp.65-68
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• 2013

A novel bumping process using solder bump maker (SBM) is developed for fine-pitch flip chip bonding. It features maskless screen printing process. A selective solder bumping mechanism without the mask is based on the material design of SBM. Maskless screen printing process can implement easily a fine-pitch, low-cost, and lead-free solder-on-pad (SoP) technology. Its another advantage is ternary or quaternary lead-free SoP can be formed easily. The process includes two main steps: one is the thermally activated aggregation of solder powder on the metal pads on a substrate and the other is the reflow of the deposited powder on the pads. Only a small quantity of solder powder adjacent to the pads can join the first step, so a quite uniform SoP array on the substrate can be easily obtained regardless of the pad configurations. Through this process, an SoP array on an organic substrate with a pitch of 130 ${\mu}m$ is, successfully, formed.

• 전자공학회논문지D
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• 제36D권11호
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• pp.33-44
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• 1999

3차원 위상변이 마스크의 단차 효과를 분석하기 위해 투명 경계조건, 주기적인 경계조건, 및 연속조건을 가진 경계요소법을 광 리소그래피 공정 시뮬레이션에 새로이 적용하였으며, 해석적인 해와 참고문헌의 결과와 비교함으로써 구현된 모듈의 정확성을 검증하였다. 또한, 기존의 rigorous coupled wave analysis에 의한 방법에 비해 수렴성과 계산 시간 측면에서 경계요소법을 이용하는 것이 더 효율적임을 확인하였다. 끝으로 비교적 간단한 위상변이 마스크와 다층-위상변이 마스크에 대한 최적 설계 과정을 기술하였다.

• 대한기계학회논문집A
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• 제25권3호
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• pp.529-536
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• 2001

We investigate a surface-micromachined capacitive accelerometer with the grid-type electrodes surrounded by a perforated proof-mass frame. An electromechanical analysis of the microaccelerometer has been performed to obtain analytical formulae for natural frequency and output sensitivity response estimation. A set of prototype devices has been designed and fabricated based on a 4-mask surface-micromachining process. The resonant frequency of 5.8$\pm$0.17kHz and the detection sensitivity of 0.28$\pm$0.03mV/g have been measured from the fabricated devices. The parasitic capacitance of the detection circuit with a charge amplifier has been measured as 3.34$\pm$1.16pF. From the uncertainty analysis, we find that the major uncertainty in the natural frequency of the accelerometer comes from the micromachining error in the beam width patterning process. The major source of the sensitivity uncertainty includes uncertainty of the parasitic capacitance, the inter-electrode gap and the resonant frequency, contributing to the overall sensitivity uncertainty in the portions of 75%, 14% and 11%, respectively.

• 전자공학회논문지A
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• 제28A권10호
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• pp.821-829
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• 1991

In this paper, a BICMOS technology that has CMOS devices for digital application and bipolar devices for high voltage (80V) analog applications is presented. Basic concept to design BICMOS device is simple process technology without making too many performance trade-offs. The base line process is poly gate p-well CMOS process and three additional masking steps are added to improve bipolar characteristics. The key ingredients of bipolar integration are n+ buried layer process, up/down isolation process and p-well base process. The bipolar base region is formed simultaneously with the region of CMOS p-well area to reduce mask and heat cycle steps. As a result, hFE value of NPN bipolar transistor is 100-150(Ic=1mA). Collector resistance value is 138 ohm in case of bent type collector structure. Breakdown voltage of BVebo, BVcbo and BVceo are 21V, 115V and78V respectively. Threshold voltage is ${\pm}$1.0V for NMOS and PMOS transistor. Breakdown voltage of NMOS and PMOS transistor is obtained 22V and 19V respectively. 41 stage CMOS ring oscillator has 0.8ns delay time.

• 한국정밀공학회지
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• 제23권9호
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• pp.164-173
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• 2006

The cooling capacity of a micro-heat pipe is mainly governed by the magnitude of capillary pressure induced in the wick structure. For microchannel wicks, a higher capillary pressure is achievable for narrower and deeper channels. In this study, a metallic micro-heat pipe adopting high-aspect-ratio microchannel wicks is fabricated. Micromachining of high-aspect-ratio microchannels is done using the laser-induced wet etching technique in which a focused laser beam irradiates the workpiece placed in a liquid etchant along a desired channel pattern. Because of the direct writing characteristic of the laser-induced wet etching method, no mask is necessary and the fabrication procedure is relatively simple. Deep microchannels of an aspect ratio close to 10 can be readily fabricated with little heat damage of the workpiece. The laser-induced wet etching process for the fabrication of high-aspect-ratio microchannels in 0.5mm thick stainless steel foil is presented in detail. The shape and size variations of microchannels with respect to the process variables, such as laser power, scanning speed, number of scans, and etchant concentration are closely examined. Also, the fabrication of a flat micro-heat pipe based on the high-aspect-ratio microchannels is demonstrated.

• 한국전자파학회논문지
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• 제26권11호
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• pp.978-984
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• 2015

본 논문에서는 유무인항공기에서 사용될 통달거리 200 km, 전송속도 45 Mbps급 데이터 전송장비의 RF 송수신기에 대해 다룬다. RF 송수신기는 Ku 대역에서 동작하도록 설계되었으며, 상/하향 변환모듈, 고출력 증폭 모듈, 전단 처리 모듈로 구성된다. 제안된 RF 송수신기의 성능을 만족시키기 위해 출력신호 레벨이 10 W급인 전력 증폭기가 요구되었으며, 이는 GaN 소자기반의 전력증폭기로 구현되었다. 또한, 적응형 전송속도 변환기능이 요구되었고, 이를 위해 다양한 대역폭의 신호를 수신할 때의 상호 주파수 간섭을 최소화하기 위하여 6종의 SAW 필터로 구성된 수신기 구조가 적용되었다. 시스템 요구사항의 만족 여부를 확인하기 위해 AWR 시뮬레이션 툴을 이용하였다.

• 대한원격탐사학회:학술대회논문집
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• 대한원격탐사학회 2007년도 Proceedings of ISRS 2007
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• pp.282-285
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• 2007

Satellite observed brightness temperature simulation using a radiative transfer model (here after, RTM) is useful for various fields, for example sensor design and channel selection by using theoretically calculated radiance data, development of satellite data processing algorithm and algorithm parameter determination before launch. This study is focused on elaborating the simulation procedure, and analyzing of difference between observed and modelled clear sky brightness temperatures. For the CMDPS (COMS Meteorological Data Processing System) development, the simulated clear sky brightness temperatures are used to determine whether the corresponding pixels are cloud-contaminated in cloud mask algorithm as a reference data. Also it provides important information for calibrating satellite observed radiances. Meanwhile, simulated brightness temperatures of COMS channels plan to be used for assessing the CMDPS performance test. For these applications, the RTM requires fast calculation and high accuracy. The simulated clear sky brightness temperatures are compared with those of MTSAT-1R observation to assess the model performance and the quality of the observation. The results show that there is good agreement in the ocean mostly, while in the land disagreement is partially found due to surface characteristics such as land surface temperature, surface vegetation, terrain effect, and so on.

• 한국통신학회논문지
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• 제39A권10호
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• pp.613-615
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• 2014

본 논문에서는 TVWS(TV white space)용 광대역 고선형 전력증폭기의 설계 및 구현에 대해서 기술한다. TVWS용 전력증폭기는 기존의 방송시스템에 미치는 영향을 최소화하기 위해서 방사전력 및 스펙트럼 마스크를 엄격하게 제한해야 한다. 구현한 전력증폭기는 460 ~ 698MHz 대역에서 동작하며, $24.7{\pm}1dB$의 이득, -25dB 이하의 입력반사계수, -7.82dB 이하의 출력반사계수 그리고 22.2dBm 출력전력에서 -57.7dBc의 선형성을 갖는다.

• 전자공학회논문지T
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• 제35T권1호
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• pp.75-81
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• 1998

본 논문은 장방형 다이아프램 형상과 단일형 피에조저항 전단응력 스트레인 게이지 와의 관계를 해석하여 최적의 전단응력 압력센서를 설계하기 위한 것이다. 다이아프램상의 전단응력을 시뮬레이션 하기 위하여 유한요소법 분석 프로그램 ANSYS 5.1를 사용하였다. 시뮬레이션 결과는 다이아프램 형상비가 3일때 스트레인 게이지의 위치는 중앙에서, 크기는 전체 장방형 다이아프램 크기의 8%를 점유할때 온도에 안정적이고, 최대 감도를 가진다는 것을 조사하였다.

• 한국전기전자재료학회논문지
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• 제13권5호
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• pp.371-375
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• 2000

In this paper a new conductivity modulated power transistor called the Lateral Insulated Gated Bipolar Transistor which included n+ ring and p-channel gate is presented. A new lateral IGBT structure is proposed to suppress latch-up and to improve turn off time by imploying n+ ring and p-channel gate and verified by MEDICI. The simulated I-V characteristics at $V_{G}$=15V show that the latch up occurs at $V_{A}$=18V and 6.9$\times$10$^{-5}$ A/${\mu}{\textrm}{m}$ for the proposed LIGBT while the conventional LIGBT latches at $V_{A}$=1.3V and 1.96${\mu}{\textrm}{m}$10$^{-5A}$${\mu}{\textrm}{m}$. It is shown that turn off characteristic of new LIGBT is 8 times than that of conventional LIGBT. And noble LIGBT is not n+ buffer layer because that It includes p channel gate and n+ ring. Therefore Mask for the buffer layer isn’t needed. The concentration of n+ ring is and the numbers of n+ ring and p channel gate are three for the optimal design.n.n.n.n.