• Title/Summary/Keyword: March test

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Design of Data Retention Test Circuit for Large Capacity DRAMs (대용량 Dynamic RAM의 Data Retention 테스트 회로 설계)

  • 설병수;김대환;유영갑
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.30A no.9
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    • pp.59-70
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    • 1993
  • An efficient test method based on march test is presented to cover line leakage failures associated with bit and word lines or mega bit DRAM chips. A modified column march (Y-march) pattern is derived to improve fault coverage against the data retention failure. Time delay concept is introduced to develop a new column march test algorithm detecting various data retention failures. A built-in test circuit based on the column march pattern is designed and verified using logic simulation, confirming correct test operations.

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Modified March Algorithm Considering NPSFs (NPSFs를 고려한 수정된 March 알고리즘)

  • Kim, Tae-Hyeong;Yun, Su-Mun;Park, Seong-Ju
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.4
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    • pp.71-79
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    • 2000
  • The original March algorithms cannot detect CMOS ADOFs(Address Decoder Open Faults) which requires separate deterministic test patterns. Modified March algorithm using DOF(Degree of Freedom) was suggested to detect these faults in addition to conventional stuck faults. This paper augments the modified march test to further capture NPSFs(Neighborhood Pattern Sensitive Faults). Complete CA(Cellular Automata) is used for address generation and Rl-LFSRs(Randomly Inversed LFSRs) for data generation. A new modified March algorithm can detect SAF, CF, TF, CMOS ADOFs, and part of NPSFs. Time complexity of this algorithm is still O(n).

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Design and implementation of improved march test algorithm for embedded meories (내장된 메모리를 위한 향상된 March 테스트 알고리듬의 설계 및 구현)

  • Park, Gang-Min;Chang, Hoon;Yang, Seung-Min
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.7
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    • pp.1394-1402
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    • 1997
  • In this work, an efficient test algorithm and BIST architeture a for embedded memories are presented. The proposed test algorithm can fully detect stuck-at fault, transition fault, coupling fault. Moreover, the proposed test algorithm can detect nighborhood pattern sensitive fault which could not be detected in previous march test algoarithms. The proposed test algorithm perposed test algorithm performs testing for neghborhood pattern sensitive fault using backgroung data which has been used word-oriented memory testing.

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An Effective Memory Test Algorithm for Detecting NPSFs (이웃 패턴 감응 고장을 위한 효과적인 메모리 테스트 알고리듬)

  • Suh, Il-Seok;Kang, Yong-Seok;Kang, Sung-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.11
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    • pp.44-52
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    • 2002
  • Since memory technology has been developed fast, test complexity and test time have been increased simultaneously. In practice, March algorithms are used widely for detecting various faults. However, March algorithms cannot detect NPSFs(Neighborhood Pattern Sensitive Faults) which must be considered for DRAMs. This paper proposes an effective algorithm for high fault coverage by modifying the conventional March algorithms.

The Limit of the March Test Method and Algorithms (On Detecting Coupling Faults of Semiconductor Memories) (March Test 기법의 한게 및 알고리즘(반도체 메모리의 커플링 고장을 중심으로))

  • 여정모;조상복
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.29A no.8
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    • pp.99-109
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    • 1992
  • First, the coupling faults of semiconductor memory are classified in detail. The chained coupling fault is introduced and defined, which results from sequential influencing of the coupling effects among memory cells, and its mapping relation is described. The linked coupling fault and its order are defined. Second, the deterministic “Algorithm GA” is proposed, which detects stuack-at faults, transition faults, address decoder faults, unlinked 2-coupling faults, and unlinked chained coupling faults. The time complexity and the fault coverage are improved in this algorithm. Third, it is proved that the march test of an address sequence can detect 97.796% of the linked 2-coupling faults with order 2. The deterministic “Algorithm NA” proposed can detect to the limit. The time complexity and the fault coverage are improved in this algorithm.

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Relationship between the QBO and Surface Air Temperature in the Korean Peninsula (QBO와 한반도 지상기온 간의 관계)

  • Park, Chang-Hyun;Son, Seok-Woo
    • Atmosphere
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    • v.32 no.1
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    • pp.39-49
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    • 2022
  • The relationship between the Quasi-Biennial Oscillation (QBO) and the surface air temperature (SAT) in the Korean Peninsula is investigated for the period of 1979~2019. The QBO shows a statistically significant causal relationship with the Korean SAT in early spring when the El Niño-Southern Oscillation (ENSO)'s effect is relatively weak. In particular, when the QBO wind at 70 hPa is westerly, the Korean SAT becomes colder than normal in March. This relationship in March, which is statistically significant, is valid not only for March QBO but also for February QBO, indicating that the QBO is leading the Korean SAT. The Granger causality test indeed shows a causal relationship between February QBO and March Korean SAT. The QBO-Korean SAT relationship is more pronounced in the southeastern part of the Korean Peninsula. As the QBO-related circulation anomalies are evident in the North Pacific and the eastern Eurasia, they induce the horizontal temperature advection to the southeastern part of the Korean Peninsula. This result suggests that the QBO could be useful for improving seasonal prediction of the Korean SAT in March.

Built-in self test for high density SRAMs using parallel test methodology (병렬 테스트 방법을 적용한 고집적 SRAM을 위한 내장된 자체 테스트 기법)

  • 강용석;이종철;강성호
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.8
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    • pp.10-22
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    • 1998
  • To handle the density increase of SRAMs, a new parallel testing methodology based on built-in self test (BIST) is developed, which allows to access multiple cells simultaneously. The main idea is that a march algorithm is dperformed concurently in each baisc marching block hwich makes up whole memory cell array. The new parallel access method is very efficient in speed and reuqires a very thny hardware overhead for BIST circuitry. Results show that the fault coverage of the applied march algorithm can be achieved with a lower complexity order. This new paralle testing algorithm tests an .root.n *.root.n SRAM which consists of .root.k * .root.k basic marching blocks in O(5*.root.k*(.root.k+.root.k)) test sequence.

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IEEE std. 1500 based an Efficient Programmable Memory BIST (IEEE 1500 표준 기반의 효율적인 프로그램 가능한 메모리 BIST)

  • Park, Youngkyu;Choi, Inhyuk;Kang, Sungho
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.2
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    • pp.114-121
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    • 2013
  • As the weight of embedded memory within Systems-On-Chips(SoC) rapidly increases to 80-90% of the number of total transistors, the importance of testing embedded memory in SoC increases. This paper proposes IEEE std. 1500 wrapper based Programmable Memory Built-In Self-Test(PMBIST) architecture which can support various kinds of test algorithm. The proposed PMBIST guarantees high flexibility, programmability and fault coverage using not only March algorithms but also non-March algorithms such as Walking and Galloping. The PMBIST has an optimal hardware overhead by an optimum program instruction set and a smaller program memory. Furthermore, the proposed fault information processing scheme guarantees improvement of the memory yield by effectively supporting three types of the diagnostic methods for repair and diagnosis.

Survey on Actually Infected Condition of Aujeszky′s Disease to the Consigned Pigs in Seoul from 1990 to 1993 (90~93년도 서울 지역에 출하된 돼지의 Aujeszky′s병 감염 실태 조사)

  • 최준식;육동현;김성삼;문현칠
    • Korean Journal of Veterinary Service
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    • v.17 no.1
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    • pp.19-24
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    • 1994
  • The porcine Aujeszky's disease was surveyed by Enzyme Immunodiffusion method and serologic neutralization test to the slaughtered pigs at slaughtehouse only in Seoul from March, 1990 to October, 1993. After detecting the positive by enzyme immunodiffusion method primary, we decided finally the positive by serologic neutralization test secondary. Results obtained through the experiments were summarized as followed; 1. The positive of Aujeszky's disease in March, 1990 was 2 of 1,000 sera. 2 positive were decided as the consigned pigs in Kalsan, Hongsung, Chungnaa 2. The positive of Aujezsky's disease in May, 1991 was decided 1 serum at Pogok, Yongin, Kyeonggi. 3. All of the positive detected by Enzyme immunodiffusion Method in 1993 were decided finally in the negative sera. 4. The positive sera detected in 1992 were decided 32 sera at Gyeonggi, 6 at Chungnam, and 1 at Gangwon. Especially, the positive sera percentage detected by Kit Latex Aujeszky Test appeared 78.04% at Gyonggi and by enzyme immunodiffusion Method appeared 11.11% at Chungnam and Gangwon.

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An Efficient Test Algorithm for Dual Port Memory (이중 포트 메모리를 위한 효과적인 테스트 알고리듬)

  • 김지혜;송동섭;배상민;강성호
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.1
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    • pp.72-79
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    • 2003
  • Due to the improvements in circuit design technique and manufacturing technique, complexity of a circuit is growing along with the demand for memories with large capacities. Likewise, as a memory capacity gets larger, testing gets harder and testing cost increases, and testing process in chip development gets larger as well. Therefore, a research on an effective test algorithm to improve the chip yield rate in a short time period is becoming an important task. This paper proposes an effective, March C-algorithm based, test algorithm that can also be applied to a dual-port memory since it considers all the fault types, which can be occurred in a single-port as well as in a dual-port memory, without increasing the test length.