• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.5C
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• pp.512-521
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• 2002

Recently, conventional superscalar RISC processors arrive their performance limit, and many researches on the next-generation architecture are concentrated on SMT(Simultaneous Multi-Threading). In SMT processors, multiple threads are executed simultaneously and share hardware resources dynamically. In this case, it is more important to supply instructions from multiple threads to processor core efficiently than ever. Because SMT architecture shows higher IPC(Instructions per cycle) than superscalar architecture, performance is influenced by fetch bandwidth and the size of fetch queue. Moreover, to use TLP(Thread Level Parallelism) efficiently, fetch thread selection algorithm and fetch bandwidth for each selected threads must be carefully designed. Thus, in this paper, the performance values influenced by these factors are analyzed. Based on the results, an optimal instruction fetch strategy for SMT processors is proposed.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.1
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• pp.175-181
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• 2010

In this paper, we propose a novel hardware architecture for Rate control module for real time full HD video compression. In the proposed architecture, QP is updated by using the rate control algorithm to every the macroblock line(120MB for Full HD, 20MB for CIF image). Since there are many complex arithmetic and floating point arithmetic in rate control algorithm of JM for H.264, it is impossible to process the rate control algorithm using the integer arithmetic CPU core. So we adopted floating point arithmetic unit in our architecture, and implemented the rate control algorithm using the floating unit. With this implemented hardware, the implemented hardware is verified to be operated in real time.

• Smart Media Journal
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• v.11 no.2
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• pp.63-69
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• 2022

As the use of various IoT devices increases, the importance of IoT platforms is also rising. Recently, artificial intelligence technology is being combined with IoT devices, and research applying a neuromorphic architecture to IoT devices with low power is also increasing. In this paper, an application scenario is proposed based on NA-IDE (Neuromorphic Architecture-based autonomous IoT application integrated development environment) with IoT devices and FPGA devices in a GUI format. The proposed scenario connects a camera module to an IoT device, collects MNIST dataset images online, recognizes the collected images through a neuromorphic board, and displays the recognition results through a device module connected to other IoT devices. If the neuromorphic architecture is applied to many IoT devices and used for various application services, the autonomous IoT application integrated development environment based on the neuromorphic architecture is expected to emerge as a core technology leading the 4th industrial revolution.

• Journal of the Korea Society of Computer and Information
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• v.17 no.6
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• pp.1-11
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• 2012

As the process technology scales down, multi-core processors cause serious problems such as increased interconnection delay, high power consumption and thermal problems. To solve the problems in 2D multi-core processors, researchers have focused on the 3D multi-core processor architecture. Compared to the 2D multi-core processor, the 3D multi-core processor decreases interconnection delay by reducing wire length significantly, since each core on different layers is connected using vertical through-silicon via(TSV). However, the power density in the 3D multi-core processor is increased dramatically compared to that in the 2D multi-core processor, because multiple cores are stacked vertically. Unfortunately, increased power density causes thermal problems, resulting in high cooling cost, negative impact on the reliability. Therefore, temperature should be considered together with performance in designing 3D multi-core processors. In this work, we analyze the temperature of the cache in quad-core processors varying cache organization. Then, we propose the low-temperature cache organization to overcome the thermal problems. Our evaluation shows that peak temperature of the instruction cache is lower than threshold. The peak temperature of the data cache is higher than threshold when the cache is composed of many ways. According to the results, our proposed cache organization not only efficiently reduces the peak temperature but also reduces the performance degradation for 3D quad-core processors.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39B no.6
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• pp.406-413
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• 2014

In recent years, various contents traffics are increasing according to the various internet connectable devices which have become contents provider. Because these contents traffics show different pattern from previous one, many researches for efficient contents delivery system are in progress. CCN(Contents Centric Network), one of the representative research subject, has inter operation problem with a current network because it has clean-state architecture. In this point of view, this paper suggests the SaNA(Service adaptive Network Architecture) for efficient contents delivery when it inter operates with current network architecture. SaNA is a convergence system which can be gradually applied to current network using CCN and SDN(Software Defined Network) which are core future internet technologies. Appling this system on the contents delivery service, it can increase the network bandwidth utilization by two times and decrease the contents delivery time by 1.7 times.

• Smart Structures and Systems
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• v.29 no.1
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• pp.195-206
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• 2022

Crack detection is essential for inspection of existing structures and crack segmentation based on deep learning is a significant solution. However, datasets are usually one of the key issues. When building a new dataset for deep learning, laborious and time-consuming annotation of a large number of crack images is an obstacle. The aim of this study is to develop an approach that can automatically select a small portion of the most informative crack images from a large pool in order to annotate them, not to label all crack images. An active learning method with difficulty learning mechanism for crack segmentation tasks is proposed. Experiments are carried out on a crack image dataset of a steel box girder, which contains 500 images of 320×320 size for training, 100 for validation, and 190 for testing. In active learning experiments, the 500 images for training are acted as unlabeled image. The acquisition function in our method is compared with traditional acquisition functions, i.e., Query-By-Committee (QBC), Entropy, and Core-set. Further, comparisons are made on four common segmentation networks: U-Net, DeepLabV3, Feature Pyramid Network (FPN), and PSPNet. The results show that when training occurs with 200 (40%) of the most informative crack images that are selected by our method, the four segmentation networks can achieve 92%-95% of the obtained performance when training takes place with 500 (100%) crack images. The acquisition function in our method shows more accurate measurements of informativeness for unlabeled crack images compared to the four traditional acquisition functions at most active learning stages. Our method can select the most informative images for annotation from many unlabeled crack images automatically and accurately. Additionally, the dataset built after selecting 40% of all crack images can support crack segmentation networks that perform more than 92% when all the images are used.

• Journal of the Korean Society of Systems Engineering
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• v.15 no.2
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• pp.98-107
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• 2019

The defense system development process is a process of developing various systems that perform functions in various functional areas such as battlefield awareness, command control, force application, and logistical support. In other words, the defense system development process is a process of developing many systems simultaneously in various functional areas. Various systems developed through this process should be interoperable so that they can be integrated and operated in a joint warfighting environment. To successfully implement this, the US Department of Defense uses the Joint Capability Integrated Development System(JCIDS) for the defense system development, and within this JCIDS processes the Capability Based Assessment(CBA) methodology as its core technology. This CBA methodology transforms the mission activity requirements to functional capability requirements logically and transforms the functional capability requirements to system requirements logically also. Smart City is a city that improves the convenience and quality of life of the citizen by integrates various systems that perform various functions of the city and smarties various functional systems with smart services by using IT technology. In other words, defense system development and smart city development have a common feature of the process of developing many systems simultaneously in various functional areas. In order to address the problem of having to develop many systems simultaneously in each functional area, it is important to logically transform the various mission scenarios into functions and logically transform the functions into systems. Therefore, a joint capability integrated development system and its core methodology, Capability Based Assessment(CBA), can be applied to smart city development. This paper proposes a method for performing a smart city concept design method using the capability based evaluation (CBA) method.

• The KIPS Transactions:PartD
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• v.12D no.3 s.99
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• pp.395-408
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• 2005

Ubiquitous computing spans a very broad range of technologies and needs very complicated user's requirements. There are many scenarios and technologies involved in ubiquitous computing. We need new software development tools and methodology to meet the requirements. A software product line is one of promising new technology for it. A software product line is a set of software intensive systems that share a common, managed set of features satisfying the specific needs of a particular market segment or mission and that are developed from a common set of core assets. Software architecture-based development is the exploration and maturation of the role of software architecture in the product line life cycle. In this thesis, we identify the foundational concepts underlying software product lines and the essential activities to develop the mobile application systems. So, we define, design, and implement the Mobile Application System Architecture(MASA) that includes the development process for applying into mobile business domain and encompass scoping and gathering requirements for the Product line based on Component Based Development(CBD).

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.12
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• pp.968-972
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• 2009

The multi-core processors are being widely exploited by many high-end systems. With significant advances in processor architecture, the network band-width required on the high-end systems is increasing drastically. It is therefore highly desirable to manage multiple cores efficiently to achieve high network band-width with minimum resource requirements. Modern operating systems, however, still have significant design and optimization space to leverage the network performance over multi-core systems. In this paper, we suggest a novel networking process scheduling scheme, which decides the best processor affinity of networking processes based on the processor cache layout, communication intensiveness, and processor loads. The experimental results show that the scheduling scheme implemented in the Linux kernel can improve the network bandwidth and the effectiveness of processor utilization by 20% and 59%, respectively.

• Journal of Marine Bioscience and Biotechnology
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• v.10 no.2
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• pp.34-43
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• 2018

Silicon has become of increasing importance as the basic element of many high-technology products. Its synthesis is very difficult requiring high temperature solid-state reactions (> $1000^{\circ}C$) or lower temperature methods ($100-200^{\circ}C$) involving hydrothermal and solvothermal reactions under extreme pH conditions. In nature, on the other hand, a wide range of living organisms have collectively evolved the means of biosilicification at the astounding rate of gigatons/year. This is impressive because biosilicification in these organisms occurs under mild physiological conditions. Marine sponges possess the ability to sequester soluble silicon sources from their environments and assemble them into intricate 3D architecture. The advent of molecular biology has recently made it possible to glean molecular information about biosilicification from these systems and it turned out that enzyme silicatein is the core of biosilicification. In this review, biosilicification regulated by silicatein and its mechanism are described. Also, production of silicatein through recombinant technology and several applications of recombinant silicatein are described including immobilization of silicatein, formation of Au or Ag nanoparticles on nanowires, nanolithography approaches, core-shell materials, encapsulation, bone replacement materials, and microstructured optical fibers.