• 제목/요약/키워드: Manufacturing Yield

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스마트제조시스템의 설비인자 분석 (Analysis of Equipment Factor for Smart Manufacturing System)

  • 안재준;심현식
    • 반도체디스플레이기술학회지
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    • 제21권4호
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    • pp.168-173
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    • 2022
  • As the function of a product is advanced and the process is refined, the yield in the fine manufacturing process becomes an important variable that determines the cost and quality of the product. Since a fine manufacturing process generally produces a product through many steps, it is difficult to find which process or equipment has a defect, and thus it is practically difficult to ensure a high yield. This paper presents the system architecture of how to build a smart manufacturing system to analyze the big data of the manufacturing plant, and the equipment factor analysis methodology to increase the yield of products in the smart manufacturing system. In order to improve the yield of the product, it is necessary to analyze the defect factor that causes the low yield among the numerous factors of the equipment, and find and manage the equipment factor that affects the defect factor. This study analyzed the key factors of abnormal equipment that affect the yield of products in the manufacturing process using the data mining technique. Eventually, a methodology for finding key factors of abnormal equipment that directly affect the yield of products in smart manufacturing systems is presented. The methodology presented in this study was applied to the actual manufacturing plant to confirm the effect of key factors of important facilities on yield.

LCD생산시스템에서 Repair와 Rework을 고려한 수율과 원가 분석 모델 (Relationship Between Yield and Cost Considering Repair and Rework for LCD Manufacturing System)

  • 하정훈
    • 대한산업공학회지
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    • 제33권3호
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    • pp.364-372
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    • 2007
  • The cost modeling of the LCD manufacturing system with the repair and the rework process is hard to achieve because of it's complex manufacturing process. The technical cost modeling divides each process separately and hierarchically, so it is very useful to calculate the total manufacturing cost of the complex manufacturing system. We applied the method to the complex LCD manufacturing system to obtain more accurate cost model. Yields are the most important control parameters in manufacturing. In this paper, we propose a yield based cost model for the LCD manufacturing system and reveal the relationship between manufacturing yield and cost. Through the model, we can estimate the manufacturing cost on the basis of yields that are control indicators of manufacturing. Some simulations are performed to observe the effects of the yield to the cost, and the results are coincide with the real situation. With the proposed model, we expect to develop some optimization problems for enlarging productivity in the LCD industry.

반도체 제조공정에서의 이상수율 검출 방법론 (A New Abnormal Yields Detection Methodology in the Semiconductor Manufacturing Process)

  • 이장희
    • Journal of Information Technology Applications and Management
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    • 제15권1호
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    • pp.243-260
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    • 2008
  • To prevent low yields in the semiconductor industry is crucial to the success of that industry. However, to prevent low yields is difficult because of too many factors to affect yield variation and their complex relation in the semiconductor manufacturing process. This study presents a new efficient detection methodology for detecting abnormal yields including high and low yields, which can forecast the yield level of a production unit (namely a lot) based on yield-related feature variables' behaviors. In the methodology, we use C5.0 to identify the yield-related feature variables that are the combination of correlated process variables associated with yield, use SOM (Self-Organizing Map) neural networks to extract and classify significant patterns of past abnormal yield lots and finally use C5.0 to generate classification rules for detecting abnormal yield lot. We illustrate the effectiveness of our methodology using a semiconductor manufacturing company's field data.

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A Study on the Fault Process and Equipment Analysis of Plastic Ball Grid Array Manufacturing Using Data-Mining Techniques

  • Sim, Hyun Sik
    • Journal of Information Processing Systems
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    • 제16권6호
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    • pp.1271-1280
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    • 2020
  • The yield and quality of a micromanufacturing process are important management factors. In real-world situations, it is difficult to achieve a high yield from a manufacturing process because the products are produced through multiple nanoscale manufacturing processes. Therefore, it is necessary to identify the processes and equipment that lead to low yields. This paper proposes an analytical method to identify the processes and equipment that cause a defect in the plastic ball grid array (PBGA) during the manufacturing process using logistic regression and stepwise variable selection. The proposed method was tested with the lot trace records of a real work site. The records included the sequence of equipment that the lot had passed through and the number of faults of each type in the lot. We demonstrated that the test results reflect the real situation in a PBGA manufacturing process, and the major equipment parameters were then controlled to confirm the improvement in yield; the yield improved by approximately 20%.

신경망을 이용한 동적 수율 개선 모형 (Dynamic Yield Improvement Model Using Neural Networks)

  • 정현철;강창욱;강해운
    • 산업경영시스템학회지
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    • 제32권2호
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    • pp.132-139
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    • 2009
  • Yield is a very important measure that can expresses simply for productivity and performance of company. So, yield is used widely in many industries nowadays. With the development of the information technology and online based real-time process monitoring technology, many industries operate the production lines that are developed into automation system. In these production lines, the product structures are very complexity and variety. So, there are many multi-variate processes that need to be monitored with many quality characteristics and associated process variables at the same time. These situations have made it possible to obtain super-large manufacturing process data sets. However, there are many difficulties with finding the cause of process variation or useful information in the high capacity database. In order to solve this problem, neural networks technique is a favorite technique that predicts the yield of process for process control. This paper uses a neural networks technique for improvement and maintenance of yield in manufacturing process. The purpose of this paper is to model the prediction of a sub process that has much effect to improve yields in total manufacturing process and the prediction of adjustment values of this sub process. These informations feedback into the process and the process is adjusted. Also, we show that the proposed model is useful to the manufacturing process through the case study.

자동차 Steering Wheel 제조공정의 누적수율 개선을 위한 6시그마 적용사례 (A Six Sigma Application Case Study to Improve a Rolled Throughput Yield of an Automobile Steering Wheel Manufacturing Process)

  • 박종인;이동규;변재현
    • 품질경영학회지
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    • 제33권1호
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    • pp.32-41
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    • 2005
  • This paper presents a six sigma application case study for an automobile steering wheel manufacturing process using rolled throughput yield improvement activity. Hidden factory and first pass yield concept is introduced and a DMAIC procedure is implemented to maximize the first pass yield. The result of the six sigma project amounts to the reduction of failure cost of 1.2 billion won per year in the steering wheel manufacturing process. This paper can benefit six sigma practitioners in some ways.

Wafer-to-Wafer Integration을 위한 생산수율 챌린지에 대한 연구 (Manufacturing yield challenges for wafer-to-wafer integration)

  • 김사라은경
    • 마이크로전자및패키징학회지
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    • 제20권1호
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    • pp.1-5
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    • 2013
  • 3D integration 기술 특히 W2W integration 기술은 전자산업의 디바이스 scaling 문제를 해결하고 고성능화 소형화 추세에 맞춘 가장 핵심적인 기술 방향이다. 그러나 W2W integration 기술은 현재 가격과 생산수율의 장애를 가지고 있고, 이를 해결하기 위해서 웨이퍼 매칭, 리던던시, 다이 면적 축소, 배선 층 수 축소와 같은 디자인 연구들이 진행되고 있다. W2W integration 기술이 대량생산으로 연결되기 위해서는 우선적으로 웨이퍼 본딩, 실리콘연삭, TSV 배선 공정의 최적화가 이루어져야 하겠지만, 가격을 포함한 생산수율을 높이기 위해서는 반드시 디자인 연구가 선행되어야 하겠다.

반도체 제조 가상계측 공정변수를 이용한 웨이퍼 수율 예측 (A Prediction of Wafer Yield Using Product Fabrication Virtual Metrology Process Parameters in Semiconductor Manufacturing)

  • 남완식;김성범
    • 대한산업공학회지
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    • 제41권6호
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    • pp.572-578
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    • 2015
  • Yield prediction is one of the most important issues in semiconductor manufacturing. Especially, for a fast-changing environment of the semiconductor industry, accurate and reliable prediction techniques are required. In this study, we propose a prediction model to predict wafer yield based on virtual metrology process parameters in semiconductor manufacturing. The proposed prediction model addresses imbalance problems frequently encountered in semiconductor processes so as to construct reliable prediction model. The effectiveness and applicability of the proposed procedure was demonstrated through a real data from a leading semiconductor industry in South Korea.

AOI 데이터를 이용한 효과적인 Defect Size Distribution 구축방법: 반도체와 LCD생산 응용 (Effective Construction Method of Defect Size Distribution Using AOI Data: Application for Semiconductor and LCD Manufacturing)

  • 하정훈
    • 산업공학
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    • 제21권2호
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    • pp.151-160
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    • 2008
  • Defect size distribution is a probability density function for the defects that occur on wafers or glasses during semiconductor/LCD fabrication. It is one of the most important information to estimate manufacturing yield using well-known statistical estimation methods. The defects are detected by automatic optical inspection (AOI) facilities. However, the data that is provided from AOI is not accurate due to resolution of AOI and its defect detection mechanism. It causes distortion of defect size distribution and results in wrong estimation of the manufacturing yield. In this paper, I suggest a size conversion method and a maximum likelihood estimator to overcome the vague defect size information of AOI. The methods are verified by the Monte Carlo simulation that is constructed as similar as real situation.

Online Experts Screening the Worst Slicing Machine to Control Wafer Yield via the Analytic Hierarchy Process

  • Lin, Chin-Tsai;Chang, Che-Wei;Wu, Cheng-Ru;Chen, Huang-Chu
    • International Journal of Quality Innovation
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    • 제7권2호
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    • pp.141-156
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    • 2006
  • This study describes a novel algorithm for optimizing the quality yield of silicon wafer slicing. 12 inch wafer slicing is the most difficult in terms of semiconductor manufacturing yield. As silicon wafer slicing directly impacts production costs, semiconductor manufacturers are especially concerned with increasing and maintaining the yield, as well as identifying why yields decline. The criteria for establishing the proposed algorithm are derived from a literature review and interviews with a group of experts in semiconductor manufacturing. The modified Delphi method is then adopted to analyze those results. The proposed algorithm also incorporates the analytic hierarchy process (AHP) to determine the weights of evaluation. Additionally, the proposed algorithm can select the evaluation outcomes to identify the worst machine of precision. Finally, results of the exponential weighted moving average (EWMA) control chart demonstrate the feasibility of the proposed AHP-based algorithm in effectively selecting the evaluation outcomes and evaluating the precision of the worst performing machines. So, through collect data (the quality and quantity) to judge the result by AHP, it is the key to help the engineer can find out the manufacturing process yield quickly effectively.