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http://dx.doi.org/10.6117/kmeps.2013.20.1.001

Manufacturing yield challenges for wafer-to-wafer integration  

Kim, Sarah Eunkyung (서울과학기술대학교 NID융합기술대학원)
Publication Information
Journal of the Microelectronics and Packaging Society / v.20, no.1, 2013 , pp. 1-5 More about this Journal
Abstract
Wafer-to-Wafer (W2W) integration technology is an emerging technology promising many benefits, such as reduced size, improved performance, reduced power, lower cost, and divergent integration. As the maturity of W2W technology progresses, new applications will become more viable. However, at present the cost for W2W integration is still very high and both manufacturing yield and reliability issues have not been resolved yet for high volume manufacturing (HVM). Especially for WTW integration resolving compound yield issue can be a key factor for HVM. To have the full benefits of WTW integration technology more than simple wafer stacking technologies are necessary. In this paper, the manufacturing yield for W2W integration is described and the challenges of WTW integration will be discussed.
Keywords
3D stacked IC; Yield; TSV; 3D Integration; Wafer-to-Wafer;
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Times Cited By KSCI : 2  (Citation Analysis)
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