• Title/Summary/Keyword: MPEG-AAC

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Implementation of the MPEG-2 AAC Decoder Module using VHDL (VHDL을 이용한 MPEG-2 AAC 복호화기 모듈의 구현)

  • 우광희;김수현;홍민철;차형태
    • Proceedings of the Korea Institute of Convergence Signal Processing
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    • 2000.08a
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    • pp.173-176
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    • 2000
  • 본 논문은 VHDL을 이용하여 1997년 국제 표준안으로 제정된 MPEG-2 AAC 복호화기의 각 모듈을 구현하였다. AAC 복호화기는 허프만 복호화, 역양자화, 고해상도 필터뱅크 등의 도구들이 필수적으로 사용된다. AAC 복호화기의 실시간 구현을 위해 각 도구들의 알고리즘을 분석하고, 하드웨어 개발에 알맞게 최적화하여 고속화와 적은 메모리를 사용하여 효율적으로 구현하였다.

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Development of MPEG-4 Audio Streaming Player on Mobile Terminal with Embedded Linux Processor (내장형 리눅스 기반 이동 단말기에서의 MPEG-4 오디오 스트리팅 재생기의 구현)

  • Cha, Kyung-Ae
    • Journal of Korea Society of Industrial Information Systems
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    • v.13 no.5
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    • pp.117-123
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    • 2008
  • In this paper, we develop MPEG-4 AAC streaming player on embedded Linux processor such as mobile terminals. Moreover we show the experimental results that the player preforms the decoding processes of MPEG-4 AAC data effectively. MPEG-4 AAC technology supports a wide range encoding rates and high sound quality so it is appropriate to adopt various applications. In particular, the need in the development of the application of audio data increases according to significantly increase in devices used in mobile environments, such as cell phones and PDAs. In this environment, it is necessary to optimize the decoding processes to the ability of the terminal hardware in order to play audio data without delays. We also implement the decoding module to optimize the processor capabilities and make the player to decode and play streaming audio data from streaming server.

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Architecture Design for MPEG-2 AAC Filter bank Decoder using Recursive Structure (Recursive 구조를 이용한 MPEG-2 AAC 복호화기의 필터뱅크 구현)

  • 박세기;강명수;오신범;이채욱
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.6C
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    • pp.865-873
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    • 2004
  • MPEG-2 Advanced Audio Coding(AAC) is widely used in the multi-channel audio compression standards. And it combines hi인-resolution filter bank prediction techniques, and Huffman coding algorithm to achieve the broadcast-quality audio level at very low data rates. The forward and inverse modified discrete transforms which are operated in the encoder and the decoder of the filter bank need many computations. In this paper, we propose suitable recursive structure at IMDCT processing for MPEG-2 AAC real-time decoder. We confirm the memory, the computation speed and complexity of the proposed structure.

A new quantization method for the realization of the low complexity MPEG-4 AAC encoder (MPEG-4 AAC를 위한 고속 양자화기)

  • Hwang, Jin-Yong;Kim, Byoung-Il;Chang, Tae-Gyu
    • Proceedings of the KIEE Conference
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    • 2006.07d
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    • pp.2047-2048
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    • 2006
  • 본 논문에서는 MPEG-4 AAC 표준에 근거하여 개인휴대단말과 같은 모바일 단말의 응용을 위해 연산 복작도를 낮춘 새로운 양자화기 구조를 제안하였다. 기존 MPEG-4 AAC 인코더의 양자화기는 rate control과 distortion control을 동시에 수행하는 순환 이중루프 구조를 갖으며, 높은 연산부담으로 인해 실시간 인코딩 및 시스템의 소비전력을 증가시키는 중요한 요인으로 작용한다. 본 논문에서는 이러한 제약조건을 극복하기 위해 허용 잡음 레벨과 대역별 양자화 잡음을 정합하는 잡음 포락선 정합기법을 제안하였고, 이를 응용하여 낮은 소비전력 실현이 가능한 단일루프 구조의 단순화된 양자화기 구조를 제안하였다. 또한 제안한 양자화기를 적용한 독자적인 구조의 MPEG-4 AAC 인코더를 구현하여 검증 및 성능평가를 수행하였다.

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DSP based implementation of MPEG-2 AAC decoder (MPEG-2 AAC 디코더의 DSP 구현에 관한 연구)

  • 정종훈;김정근;이재식;장태규;장흥엽
    • Proceedings of the IEEK Conference
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    • 2001.09a
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    • pp.481-484
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    • 2001
  • 본 논문에서는 MPEG-2 AAC 디코더의 DSP구현에 관한 연구결과로서 IS0/1EC 13818-7 표준에 의거 구현된 MPEC-2 AAC 디코더의 각 세부 기능블럭들의 구성 및 동작원리에 대하여 요약 기술하고. DSP연산에 최적화된 연산구조의 연구를 바탕으로 16bit 고정소수점 연산구조를 가지는 DSP상에서 구현된 MPEG-2 AAC 디로더의 시스템의 하드웨어 및 소프트웨어 구성에 관하여 간략한 기술하였다. 구성된 디코더의 성능평가를 통하여 MPEC-2 AAC 비트스트림을 디코딩하기 위하여 필요로 하는 연산량 및 소요 메모리의 양을 측정하고, 디코더 성능의 중요 척도인 음질평가를 수행하였다. 수행방법으로서 conformance test에 의거하여 PSNR을 측정함으로써 객관적인 성능 지표의 제시와 함께, 주관적인 음질 평가도 병행하여 수행하였다.

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Hardware design of the MPEG-2 AAC Decoder Module (MPEG-2 AAC 복호화기 모들의 하드웨어 설계)

  • 우광희;김수현;홍민철;차형태
    • Journal of the Institute of Convergence Signal Processing
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    • v.2 no.1
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    • pp.113-118
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    • 2001
  • In this paper, we implement modules of the MPEG-2 AAC decoder using VHDL. Tools of Huffman decoder, inverse quantizer and high-density filter bank which are necessary for the AAC decoder. We designed the high speed Huffman decoder using the method of octal tree search algorithm, and reduced computational time of filter bank using IFFT. Also, we use table of computation result for an exponential calculation of Inverse quantizer in fixed-point hardware, and reduced the size of table using linear interpolation. Modules implemented by hardware through optimization work in real time at low clock frequency are possible to reduce the system size.

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Channel Expansion Technology in MPEG Audio (MPEG 오디오의 채널 확장 기술)

  • Pang, Hee-Suk
    • Journal of Broadcast Engineering
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    • v.16 no.5
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    • pp.714-721
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    • 2011
  • MPEG audio uses the masking effect, high frequency component synthesis based on spectral band replication, and channel expansion based on parametric stereo for efficient compression of audio signals. In this paper, we present an overview of the state-of-the-art channel expansion technology in MPEG audio. We also present technical overviews and application examples to broadcasting services for HE-AAC v.2, MPEG Surround, spatial audio object coding (SAOC), and unified speech and audio coding (USAC) which are MPEG audio codecs based on the channel expansion technology.

A Study On the Design of a Floating Point Unit for MPEG-2 AAC Decoder (MPEG-2 AAC 복호기를 위한 부동소수점유닛 설계에 관한 연구)

  • 구대성;김필중;김종빈
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.39 no.4
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    • pp.355-355
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    • 2002
  • In this paper, we designed a FPU(floating point unit) that it is very important and requires of high density when digital audio is designed. Almost audio system must support the multi-channel and required for high quality. A floating point arithmetic function in MPEG-2 AAC that implemented by hardware is able to realtime decoding when DSP realization. The reason is that MPEG-2 AAC is compatible to the Audio field of MPEG-4 and afterwards. We designed a FPU by hardware to increase the speed of a floating point unit with much calculation part in the MPEG-2 AAC Decoder. A FPU is composed of a multiplier and an adder. A multiplier used the Radix-4 Booth algorithm and an adder adopted 1's complement method for speed up. A form of a floating point unit has 8bit of exponent part and 24bit of mantissa. It's compatible with the IEEE single precision format and adopted a pipeline architecture to increase the speed of a processor. All of sub blocks are based on ISO/IEC 13818-7 standard. The algorithm is tested by C language and the design does by use of VHDL(VHSIC Hardware Description Language). The maximum operation speed is 23.2MHz and the stable operation speed is 19MHz.

A study on the Perceptual Model for MPEG II AAC Encoder (MPEG-II AAC Encoder의 perceptual Model에 관한 연구)

  • 구대성;김정태;이강현
    • Proceedings of the IEEK Conference
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    • 2000.06c
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    • pp.93-96
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    • 2000
  • Currently, the most important technology is the compression methods in the multimedia society. Audio files are rapidly propagated through internet. MP-3 is offered to CD tone quality in 128Kbps, but 64Kbps below tone quality is abruptly down and high bitrate. on the other hand, MPEG-II AAC (Advanced Audio Coding) is not compatible with MPEG-I, but AAC has a high compression ratio 1.4 better than MP-3. Especially, AAC has max. 7.1 channel and 96KHz sampling rate. In this paper, the perceptual model is dealt with 44.1KHz sampling rate for SMR(Signal to Masking Ratio)

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Optimization of MPEG-4 AAC Codec on PDA (휴대 단말기용 MPEG-4 AAC 코덱의 최적화)

  • 김동현;김도형;정재호
    • The Journal of the Acoustical Society of Korea
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    • v.21 no.3
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    • pp.237-244
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    • 2002
  • In this paper we mention the optimization of MPEG-4 VM (Moving Picture Expert Group-4 Verification Model) GA (General Audio) AAC (Advanced Audio Coding) encoder and the design of the decoder for PDA (Personal Digital Assistant) using MPEG-4 VM source. We profiled the VMC source and several optimization methods have applied to those selected functions from the profiling. Intel Pentium III 600 MHz PC, which uses windows 98 as OS, takes about 20 times of encoding time compared to input sample running time, with additional options, and about 10 times without any option. Decoding time on PDA was over 35 seconds for the 17 seconds input sample. After optimization, the encoding time has reduced to 50% and the real time decoding has achieved on PDA.