• Communications of the Korean Mathematical Society
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• v.11 no.3
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• pp.657-663
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• 1996

In this paper we give some conditions under which the Weyl spectrum of an operator satisfies the spectral mapping theorem for analytic functions. Also we show that Weyl's theorem holds for p(T) where T is an operator of M-power class (N) and p is a polynomial on a neighborhood of $\sigam(T)$. Finally we answer an old question of Oberai.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.1
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• pp.83-88
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• 2007

The reliability characteristics of class-E RF power amplifier are studied, based on the degradation of MOSFET electrical characteristics. The class-E power amplifier operates as a switch mode operation to achieve high efficiency. This operation leads to high voltage stress when MOSFET switch is turned-off. The increase in threshold voltage and decrease in nobility caused by high voltage stress leads to a drop in the drain current. In the class-E power amplifier the effects caused by the degradation of MOSFET drain current is a drop of the power efficiency and output power. But the small inductor in the class-E load network allows the reliability to be improved. After $10^{7}\;sec$. the drain current decreases 46.3% and the PAE(Power Added Efficiency) decreases from 58% to 36% when the load inductor is 1mH. But when the load inductor is 1nH the drain current decreases 8.89% and the PAE decreases from 59% to 55%.

• Journal of electromagnetic engineering and science
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• v.14 no.3
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• pp.284-292
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• 2014

This paper presents a characteristic evaluation of commercial gallium nitride (GaN) transistors having two different gate-lengths of $0.4-{\mu}m$ and $0.25-{\mu}m$ in the design of a class-S power amplifier (PA). Class-S PA is operated by a random pulse-width input signal from band-pass delta-sigma modulation and has to deal with harmonics that consider quantization noise. Although a transistor having a short gate-length has an advantage of efficient operation at higher frequency for harmonics of the pulse signal, several problems can arise, such as the cost and export license of a $0.25-{\mu}m$ transistor. The possibility of using a $0.4-{\mu}m$ transistor on a class-S PA at 955 MHz is evaluated by comparing the frequency characteristics of GaN transistors having two different gate-lengths and extracting the intrinsic parameters as a shape of the simplified switch-based model. In addition, the effectiveness of the switch model is evaluated by currentmode class-D (CMCD) simulation. Finally, device characteristics are compared in terms of current-mode class-S PA. The analyses of the CMCD PA reveal that although the efficiency of $0.4-{\mu}m$ transistor decreases more as the operating frequency increases from 955 MHz to 3,500 MHz due to the efficiency limitation at the higher frequency region, it shows similar power and efficiency of 41.6 dBm and 49%, respectively, at 955 MHz when compared to the $0.25-{\mu}m$ transistor.

• Communications of the Korean Mathematical Society
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• v.39 no.3
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• pp.611-622
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• 2024

The purpose of this paper is to introduce a new class of rings containing the class of m-formally Noetherian rings and contained in the class of nonnil-SFT rings introduced and investigated by Benhissi and Dabbabi in 2023 [4]. Let A be a commutative ring with a unit. The ring A is said to be nonnil-m-formally Noetherian, where m ≥ 1 is an integer, if for each increasing sequence of nonnil ideals (I_n)_n≥0 of A the (increasing) sequence (∑_i1+⋯+im=nI_i1I_i2⋯I_im)_n≥0 is stationnary. We investigate the nonnil-m-formally Noetherian variant of some well known theorems on Noetherian and m-formally Noetherian rings. Also we study the transfer of this property to the trivial extension and the amalgamation algebra along an ideal. Among other results, it is shown that A is a nonnil-m-formally Noetherian ring if and only if the m-power of each nonnil radical ideal is finitely generated. Also, we prove that a flat overring of a nonnil-m-formally Noetherian ring is a nonnil-m-formally Noetherian. In addition, several characterizations are given. We establish some other results concerning m-formally Noetherian rings.

• Communications for Statistical Applications and Methods
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• v.17 no.4
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• pp.493-505
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• 2010

Developing a test for independence of random variables X and Y against the alternative has an important role in statistical inference. Kochar and Gupta (1987) proposed a class of tests in view of Block and Basu (1974) model and compared the powers for sample sizes n = 8, 12. In this paper, we evaluate Kochar and Gupta (1987) class of tests for testing independence against quadrant dependence in absolutely continuous bivariate Farlie-Gambel-Morgenstern distribution, via a simulation study for sample sizes n = 6, 8, 10, 12, 16 and 20. Furthermore, we compare the power of the tests with that proposed by G$\ddot{u}$uven and Kotz (2008) based on the asymptotic distribution of the test statistics.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.271-273
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• 2007

본 논문에서는 TV나 Audio등에 사용되는 2채널 30W급 Class-D amplifier를 동부하이텍의 0.35um BD350BA 공정을 사용하여 디지털 방식의 Class-D amplifier 출력단 구동에 적합하도록 설계하였다. 출력단은 Bootstrap 전원을 사용한 N-N type의 30V LDMOS 내장형이며 각각 $250m{\Omega}$의 턴 온 저항을 갖게 설계 되었다. THD+N 특성개선을 위한 Dead time 및 Delay 조정회로를 내장하였으며 보호회로로는 Over current, Over temperature, UVLO 가 있다.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.10
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• pp.19-26
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• 1997

Novel class AB CMOS second-generation current conveyors (CCII) using 0.6.mu.m n-well CMOS process for high-frequency current-mode signal processing were developed. The CCII for low power operation consists of a class AB push-pull stage for the current input, a complementary source follower for the voltage input, and a cascode current mirror for the current output. In this architecture, the two input stages are coupled by current mirrors to reduce the current input impedance. Measurements of the fabricated CCII show that the current input impedance is 875.ohm. and the bandwidth of flat gain when used as a voltage amplifier extends beyond 4MHz. The power dissipation is 1.25mW and the active chip area is 0.2*0.15[mm$\^$2/].

• 한국초전도학회:학술대회논문집
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• v.13
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• pp.33-33
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• 2003

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.726-729
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• 2013

In this paper, low power and high slew rate CMOS rail to rail input/output opamp applicable for ouput buffer amp, in LCD source driver IC, is proposed. Proposed op-amp, is realized the characteristics of low power consumption and high slew rate adding the newly designed control stage of class-B to the conventional output stage of class-AB. From the simulation results, we know that the proposed opamp buffer can drive a 1000pF capacitive load with a 6.5V/us slew-rate, while drawing only the the power consumption of 1.19mW from 3.3V power supply.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.22 no.5
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• pp.774-781
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• 2013

A structural analysis was carried out for a 60 N.m class flexible disk coupling. Flexible disk couplings are used to transmit power between two shafts. When a flexible coupling is used, some amount of misalignments such as angle of deviation and end play can be allowed in assembling the shafts. However, the maximum allowable misalignment should be decided to guarantee the fatigue life. In this study, the effect of the angle of deviation and end play on the maximum stress was investigated. From the analysis results, it was shown that the angle of deviation has a greater effect on the maximum stress than the end play. Furthermore, the dimensions of the disk plate were optimized to realize a better design. From the optimization, the maximum stress could be reduced by up to 5.2%.