• 전력전자학회논문지
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• 제25권3호
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• pp.157-161
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• 2020

High voltage gain converters are essential for distributed power generation systems with renewable energy sources, such as fuel cells and solar cells, because of their low voltage characteristics. This paper introduces a novel nonisolated DC-DC converter topology developed by combining an inverting buck-boost converter and voltage multipliers. In the proposed converter, the input voltage is connected in series with the output, and the majority of the input power is directly delivered to the load. The voltage multipliers are stacked in series to achieve high step-up voltage gain. The voltage stress across all of the switches and capacitors can be significantly reduced. As a result, the switches with low voltage ratings can be used to achieve high efficiency and low cost. To verify the validity of the proposed topology, a 360-W prototype converter is built to obtain the experimental results.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 D
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• pp.3058-3060
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• 2005

In this paper, the CMOS four-quadrant analog multipliers for low-voltage low-power applications are presented. The circuit approach is based on the characteristic of the LV (Low-Voltage) composite transistor which is one of the useful analog building blocks. SPICE simulations are carried out to examine the performances of the designed multipliers. Simulation results are obtained by $0.25{\mu}m$ CMOS parameters with 2V power supply. The LV composite transistor can easily be extended to perform a four-quadrant multiplication. The multiplier has a linear input range up to ${\pm}0.5V$ with a linearity error of less than 1%. The measured -3dB bandwidth is 290MHz and the power dissipation is $37{\mu}W$. The proposed multiplier is expected to be suitable for analog signal processing applications such as portable communication equipment, radio receivers, and hand-held movie cameras.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2019년도 전력전자학술대회
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• pp.83-85
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• 2019

The use of high voltage gain converters is essential for the distributed power generation systems with renewable energy sources such as the fuel cells and solar cells due to their low voltage characteristics. In this paper, a high voltage gain topology combining cascode Inverting Buck-Boost converter and voltage multiplier structure is introduced. In proposed converter, the input voltage is connected in series at the output, the portion of input power is directly delivered to the load which results in continuous input current. In addition, the voltage multiplier stage stacked in proper manner is not only enhance high step-up voltage gain ratio but also significantly reduce the voltage stress across all semiconductor devices and capacitors. As a result, the high current-low voltage switches can be employed for higher efficiency and lower cost. In order to show the feasibility of the proposed topology, the operation principle is presented and the steady-state characteristic is analyzed in detail. A 380W-40/380V prototype converter was built to validate the effectiveness of proposed converter.

• 전자공학회논문지SC
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• 제37권2호
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• pp.43-49
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• 2000

본 논문에서는 저전압 저전력 시스템에 응용 가능한 CMOS 4상한 아날로그 멀티플라이어를 제안하였다. 제안된 멀티플라이어는 저전압에서 동작이 용이하며 아날로그 회로를 설계하는데 자주 이용되는 LV(Low-Voltage) 상보형 트랜지스터 방식의 특성을 이용하였다. LV 상보형 구조는 등가 문턱전압을 감소시킴으로서 회로의 동작전압을 감소시킬 수 있는 특징이 있다. 설계된 회로의 특성은 2V 공급전압하에서 0.6㎛ CMOS 공정파라미터를 갖는 HSPICE 시뮬레이션을 통하여 측정되었다. 이때 ±0.5V까지의 입력선형 범위내에서 선형성에 대한 오차는 1%미만이었다. 또한 -3㏈ 점에서의 대역폭은 290㎒, 그리고 전력소모는 373㎼값을 나타내었다.

• ETRI Journal
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• 제32권1호
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• pp.1-10
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• 2010

In this paper, we present a fast Fourier transform (FFT) processor with four parallel data paths for multiband orthogonal frequency-division multiplexing ultra-wideband systems. The proposed 128-point FFT processor employs both a modified radix-$2^4$ algorithm and a radix-$2^3$ algorithm to significantly reduce the numbers of complex constant multipliers and complex booth multipliers. It also employs substructure-sharing multiplication units instead of constant multipliers to efficiently conduct multiplication operations with only addition and shift operations. The proposed FFT processor is implemented and tested using 0.18 ${\mu}m$ CMOS technology with a supply voltage of 1.8 V. The hardware- efficient 128-point FFT processor with four data streams can support a data processing rate of up to 1 Gsample/s while consuming 112 mW. The implementation results show that the proposed 128-point mixed-radix FFT architecture significantly reduces the hardware cost and power consumption in comparison to existing 128-point FFT architectures.

• Journal of Electrical Engineering and Technology
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• 제6권6호
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• pp.817-823
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• 2011

This paper introduces an efficient voltage multiplier circuit for improved voltage gain and power efficiency of radio frequency identification (RFID) tags. The multiplier is fully integratable and takes advantage of both passive and active circuits to reduce the required input power while yielding the desired DC voltage. A six-stage voltage multiplier and an ultralow power voltage regulator are designed in a 0.13 ${\mu}m$ complementary metal-oxide semiconductor process for 2.45 GHz RFID applications. The minimum required input power for a 1.2 V supply voltage in the case of a 50 ${\Omega}$ antenna is -20.45 dBm. The efficiency is 15.95% for a 1 $M{\Omega}$ load. The regulator consumes 129 nW DC power and maintains the reference voltage in a 1.1% range with $V_{dd}$ varying from 0.8 to 2 V. The power supply noise rejection of the regulator is 42 dB near a 2.45 GHz frequency and performs better than -32 dB from 100 Hz to 10 GHz frequencies.

• 전자공학회논문지SC
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• 제41권6호
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• pp.17-25
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• 2004

본 논문에서는, 저전력 소비를 위한 새로운 저전압 스윙 도미노 로직 회로를 제안한다. 전력 소비를 줄이기 위해, 도미노 로직의 예비충전(precharge) 노드와 출력 노드가 0V부터 V/sub REF/-V/sub TH/까지의 범위에서 스윙하도록 설계하였다. 여기서, V/sub REF/=VDD-nV/sub TH/ (n=0, 1, 2, 3)로 정의되며 설계자는 요구되는 속도와 전력 소비 특성을 감안하여 n 값을 설정할 수 있다. 이와 같은 특성은 누설 전류 없이 저전압 입력을 받을 수 있는 인버터의 구조에 의해 얻어진다. 제안된 도미노 로직을 적용하여 4×4 Braun 곱셈기를 설계하였고 공급전압 3.3V를 갖는 0.35㎛ n-well CMOS 공정으로 제작하였다. 제작된 칩은 기존 회로들과 비교할 때, 30% 이상의 전력 감소효과를 나타내며 전력-지연 곱에서도 우수한 성능을 나타내었다.