• 센서학회지
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• 제32권2호
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• pp.105-109
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• 2023

In this study, we present a power-efficient driving method for gas sensor systems based on the analysis of input signal characteristics. The analysis of the gas sensor output signal characteristics in the frequency domain shows that most of the signal portions are distributed in a relatively low frequency region when extracting the gas sensor signal, which can lead to further performance improvement of the gas sensor system. Therefore, the proposed gas signal extracting technique changes the operating frequency of the read-out circuit based on the frequency characteristics of the output signal of the gas sensor, resulting in a reduction of power consumption at the whole system level. The proposed sensing technique, which can be applied to a general-purpose commercial gas sensor system, was implemented in a printed circuit board (PCB) to verify its effectiveness at the commercial level.

• 한국압력기기공학회 논문집
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• 제6권1호
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• pp.16-22
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• 2010

Cast austenitic stainless steel(CASS) is used in the primary cooling piping system of nuclear power plant for it's relative low cost, corrosion resistance and easy of welding. However, the coarse-grain structure of cast austenitic stainless steel can strongly affect the inspectability of ultrasonic testing. The major problems encountered during inspection are beam skewing, high attenuation and high background noise of CASS component. So far, the best inspection performance involving CASS components have been achieved using low frequency TRL(Transmitter/Receiver side-by-side L wave) angle beam probe. But TRL technique could not detect shallow defect and it contains an uncertainty for sizing capability. Currently, most of researchers are studying to overcome these challenge issue. In this study, low-frequency phased array TRL technique used to detect and sizing the flaws in CF8A cast austenitic stainless steel.As conclusion, we could detect and size not only axial flaw but also circumferential flaw using low frequency phased array technique.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 학술회의 논문집 정보 및 제어부문 A
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• pp.79-82
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• 2003

This paper describes a new low-swing inverter for low power consumption. To reduce a power consumption, an output voltage swing is in the range from 0 to $V_{ref}-V_{TH}$, where $V_{ref}=V_{DD}-nV_{TH}$. This can be done by the inverter structure that allow a full swing or a swing on its input terminal without leakage current. Using this low-swing voltage technology, we propose a low-power $4\times4$ bit parallel multiplier. The proposed circuits are simulated with HSPICE under $0.35{\mu}m$ CMOS standard technology. Compare to the previous works, this circuit can reduce the power consumption rate of 11.2% and the power-delay product of 10.3%.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -1
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• pp.212-215
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• 2002

In this paper, we present an intermediate representation CDFG(Control Data Flow Graph) and an efficient scheduling technique for low power circuit design. The proposed CDFG represents control flow, data dependency and such constraints as resource constraints and timing constraints. In the scheduling technique, the constraints are substituted by subgraphs, and then the number of subgraphs is minimized by using the inclusion and overlap relation efficiently. Also, iterative rescheduling process are performed in a minimum bound estimation, starting with the as soon as possible as scheduling result, so as to reduce the power consumption in low power design. The effectiveness of the proposed algorithm has been proven by the experiment with the benchmark examples.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.326-328
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• 2005

In order to reduce the capital and overall operating cost of a fuel-cell system, a high-efficiency fuel-cell power inverter with a simple framework is required. The high-order two-inductance two-capacitance (LLCC) resonant technique is adopted in this study to implement a low-frequency 60-Hz sine wave voltage inverter utilized in the proton exchange membrane fuel-cell (PEMFC) system. The methodology for inverting dc voltage into low-frequency ac boltage is usually generated by the pulse-width-modulation (PWM) technique. However, the PWM-type inverter output has high-frequency harmonic components. Although an adequately designed filter could be utilized to overcome this problem, there are still some undesirable effects introduced by the high-frequency switching loss, electromagnetic-interference, harmonic current, and load variation. A novel power inverter via the LLCC resonant technique is designed for inverting dc voltage into 60-Hz ac sine wave voltage in the PEMFC system. This circuit scheme has the merits of low harmonic components, soft switching, high efficiency, and simplified implementation. The effectiveness of the proposed resonant inverter used for the PEMFC system is verified by numerical simulations and experimental results.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.1081-1084
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• 1998

In this paper, we propose the bus coding technique for low power consumption. For CMOS circuit most power is dissipated as dynamic power for charging and discharging node capacitances.Though the I/O and bus are likely to have the very large capacitances associated with them and dissipate much of the power dissipated by an IC, they have little beenthe special target for power reduction. The conventional Bus-Invert coding method can't decrease the peak power dissipation by 50% because the additional invert signal line can invoke a transition at the time when Bus-Invert coding isn't used to code original bus data. The proposed technique always constraints the Hamming distance between data transferred sequentially to be below the half of the bus width, and thus decrease the I/O peak power dissipation and the I/O average power dissipation.

• Journal of Power Electronics
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• 제15권6호
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• pp.1517-1523
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• 2015

The wavelet PWM (WPWM) technique has been applied in two-level inverters successfully, but directly applying the WPWM technique to three-level inverters is impossible. This paper proposes a WPWM technique suitable for a single-phase three-level inverter. The work analyzes the control strategy with the WPWM and obtains the design of its parameters. Compared with the SPWM technique for a single-phase three-level inverter under the same conditions, the WPWM can obtain high magnitudes of the output fundamental frequency component, low total harmonic distortion, and simpler digital implementation. The feasibility experiment is given to verify of the proposed WPWM technique.

• 한국정보통신학회논문지
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• 제12권3호
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• pp.555-562
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• 2008

본 논문에서는 RTL 수준에서의 클록 게이팅을 이용한 실제적인 저전력 설계 기술에 대해서 제안하고자 한다. 상위 수준의 회로 설계자에 의해 시스템의 동작을 분석하여 클록 게이팅을 위한 제어기를 이용하는 것이 가장 효율적인 전력 감소를 가져 온다. 또한 직접적으로 클록 게이팅을 수행하는 것보다는 합성툴이 자연스럽게 게이팅된 클록을 맵핑할 수 있도록 RTL 수준에서 유도하는 것이 바람직하다. RTL 코딩 단계에서부터 저전력이 고려되었다면 처음 코딩단계에서부터 클록을 게이팅 시키고, 만일 고려되지 않았다면 동작을 분석한 후에 대기 동작인 부분에서 클록을 게이팅 한다. 그리고 회로의 동작을 분석한 후에 클록의 게 이팅을 제어하기 위한 제어기를 설계하고 합성 툴에 의해 저전력 회로에 해당하는 netlist를 얻는다. 결과로부터 상위수준의 클록 게이팅에 의해 레지스터의 전력이 922 mW에서 543 mW로 42% 감소한 것을 확인할 수 있다. Power Theater 자체의 synthesizer를 이용하여 netlist로 합성한 후에 전력을 측정했을 경우에는 레지스터의 전력이 322 mW에서 208 mW로 36.5% 감소한 것을 확인할 수 있다.

• 대한추나의학회지
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• 제5권1호
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• pp.243-249
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• 2004

Objectives : This study is to evaluate the effect of flexion-distraction technique by measuring surface EMG in low back pain groups. Methods : 5 low back pain patients' constact time, power, fatigue, recovery of muscle were measured before and after flexion-distraction technique. Results : The asymmetry ratio of surface EMG in low back pain groups were Increased, but decreased after flexion-distraction technique. Conclusions : Surface EMG might be used for evaluating the effect of flexion-distraction technique.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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• pp.542-546
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• 2004

This paper presents a technique to reduce the low frequency ripple voltage of the dc output in a BIFRED converter with a small-sized energy storage capacitor. The proposed pulse width control method can be effectively used to suppress the low frequency ripple appeared in the dc output and still shows generally good performance such as low THD of input line current and high power factor. Using the small-sized energy storage capacitor, it has better merits of low cost and small size than a conventional BIFRED converter. The proposed technique is illustrated its validity and effectiveness through simulations.