• 제목/요약/키워드: Low-power Consumption

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1.5Gb/s Low Power LVDS I/O with Sense Amplifier (Sense amplifier를 이용한 1.5Gb/s 저전력 LVDS I/O 설계)

  • 변영용;이승학;김성하;김동규;김삼동;황인석
    • Proceedings of the IEEK Conference
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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    • pp.979-982
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    • 2003
  • Due to the differential transmission technique and low voltage swing, LVDS has been widely used for high speed transmission with low power consumption. This paper presents the design and implementation of interface circuits for 1.5Gb/s operation in 0.35um CMOS technology. The interface circuit ate fully compatible with the low-voltage differential signaling(LVDS) standard. The LVDS proposed in this paper utilizes a sense amplifiers instead of the conventional differential pre-amplifier, which provides a 1.5Gb/s transmission speed with further reduced driver output voltage. Furthermore, the reduced driver output voltage results in reducing the power consumption.

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CREEC: Chain Routing with Even Energy Consumption

  • Shin, Ji-Soo;Suh, Chang-Jin
    • Journal of Communications and Networks
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    • 제13권1호
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    • pp.17-25
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    • 2011
  • A convergecast is a popular routing scheme in wireless sensor networks (WSNs) in which every sensor node periodically forwards measured data along configured routing paths to a base station (BS). Prolonging lifetimes in energy-limited WSNs is an important issue because the lifetime of a WSN influences on its quality and price. Low-energy adaptive clustering hierarchy (LEACH) was the first attempt at solving this lifetime problem in convergecast WSNs, and it was followed by other solutions including power efficient gathering in sensor information systems (PEGASIS) and power efficient data gathering and aggregation protocol (PEDAP). Our solution-chain routing with even energy consumption (CREEC)-solves this problem by achieving longer average lifetimes using two strategies: i) Maximizing the fairness of energy distribution at every sensor node and ii) running a feedback mechanism that utilizes a preliminary simulation of energy consumption to save energy for depleted Sensor nodes. Simulation results confirm that CREEC outperforms all previous solutions such as LEACH, PEGASIS, PEDAP, and PEDAP-power aware (PA) with respect to the first node death and the average lifetime. CREEC performs very well at all WSN sizes, BS distances and battery capacities with an increased convergecast delay.

Electroactive Polymer Actuator for Lens-Drive Unit in Auto-Focus Compact Camera Module

  • Lee, Hyung-Kun;Choi, Nak-Jin;Jung, Sun-Kyung;Park, Kang-Ho;Jung, He-Won;Shim, Jae-Kyu;Ryu, Jae-Wook;Kim, Jong-Dae
    • ETRI Journal
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    • 제31권6호
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    • pp.695-702
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    • 2009
  • We propose a lens-drive unit composed of an ionic polymer-metal composite (IPMC) for an auto-focus compact camera module in cellular phones to solve the power consumption problem of voice coil motors which are widely used in commercial products. In this research, an IPMC incorporated into a lens-drive unit is designed to implement a large displacement in low-power consumption by using an anisotropic plasma treatment. Experimental results show that a camera module containing IPMCs can control and maintain the position of the lens by using proportional integral derivative control with a photo-reflective position sensor despite the non-linear actuation behavior of IPMCs. We demonstrate that the fabrication and commercialization of a lens actuator that has a large displacement and low power consumption using IPMCs is possible in the near future.

Analysis and Application of Power Consumption Patterns for Changing the Power Consumption Behaviors (전력소비행위 변화를 위한 전력소비패턴 분석 및 적용)

  • Jang, MinSeok;Nam, KwangWoo;Lee, YonSik
    • Journal of the Korea Institute of Information and Communication Engineering
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    • 제25권4호
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    • pp.603-610
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    • 2021
  • In this paper, we extract the user's power consumption patterns, and model the optimal consumption patterns by applying the user's environment and emotion. Based on the comparative analysis of these two patterns, we present an efficient power consumption method through changes in the user's power consumption behavior. To extract significant consumption patterns, vector standardization and binary data transformation methods are used, and learning about the ensemble's ensemble with k-means clustering is applied, and applying the support factor according to the value of k. The optimal power consumption pattern model is generated by applying forced and emotion-based control based on the learning results for ensemble aggregates with relatively low average consumption. Through experiments, we validate that it can be applied to a variety of windows through the number or size adjustment of clusters to enable forced and emotion-based control according to the user's intentions by identifying the correlation between the number of clusters and the consistency ratios.

Obstacle Avoidance Algorithm of Hybrid Wheeled and Legged Mobile Robot Based on Low-Power Walking (복합 바퀴-다리 이동형 로봇의 저전력 보행 기반 장애물 회피 알고리즘)

  • Jeong, Dong-Hyuk;Lee, Bo-Hoon;Kim, Yong-Tae
    • Journal of the Korean Institute of Intelligent Systems
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    • 제22권4호
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    • pp.448-453
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    • 2012
  • There are many researches to develop robots that improve its mobility to adapt in various uneven environments. In the paper, a hybrid wheeled and legged mobile robot is designed and a obstacle avoidance algorithm is proposed based on low power walking using LRF(Laser Range Finder). In order to stabilize the robot's motion and reduce energy consumption, we implement a low-power walking algorithm through comparison of the current value of each motors and correction of posture balance. A low-power obstacle avoidance algorithm is proposed by using LRF sensor. We improve walking stability by distributing power consumption and reduce energy consumption by selecting a shortest navigation path of the robot. The proposed methods are verified through walking and navigation experiments with the developed hybrid robot.

Design methodology of the rechargeable battery protection IC for low-power implementation (2차 전지 보호회로의 저전력 설계 기법)

  • 이종훈;김상민;김상호;김대정;김동명
    • Proceedings of the IEEK Conference
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    • 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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    • pp.169-172
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    • 2002
  • A protection integrated circuit which enables the stable operation of the rechargeable battery should be designed with a low-power architecture because it consumes the power of the battery. This paper proposed a low-power scheme especially when the several series-connected batteries are provided. By adopting a time sharing control of the batteries, the chip size and power consumption could be reduced.

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Power Consumption Analysis by Adjusting of Check Interval in Asynchronous Wireless Sensor Network (비동기 무선센서네트워크에서 체크인터벌 조절에 따른 전력소모 분석)

  • Kim, Dongwon
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • 제19권3호
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    • pp.91-96
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    • 2019
  • There are so many low power MAC protocols for wireless sensor network. IEEE802.15.4 among them has disadvantage of a large power consumption for synchronization. To save power consumption it use the superframe operation alternating sleep mode and awake mode. But latency is longer result from superframe operation. Typical asynchronous B-MAC can have shorter latency according to check interval. But transmitter consumes more power because of long preamble. And receiver is suffering from overhearing. In this paper, we propose the adaptive check interval scheme of B-MAC for enhancing the power consumption and delay latency performance. Its power consumption is evaluated by comparing the proposed scheme with a typical IEEE802.15.4.

Hardware Implementation of Low-power Display Method for OLED Panel using Adaptive Luminance Decreasing (적응적 휘도 감소를 이용한 OLED 패널의 저전력 디스플레이 방법 및 하드웨어 구현)

  • Cho, Ho-Sang;Choi, Dae-Sung;Seo, In-Seok;Kang, Bong-Soon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • 제17권7호
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    • pp.1702-1708
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    • 2013
  • OLED has good efficiency of power consumption by having no power consumption from black color as different with LCD. when it has white color, all RGB pixel should be glowing with high power consumption and that can make it has short life time. This paper suggest the way of low power consumption for OLED panel using adaptive luminance enhancement with color compensation and implement it as hardware. This way which is based on luminance information of input image makes converted luminance value from each pixel in real time. There is with using the basic idea of chromaticity reduction algorithm, showing new algorithm of color correction. And performance of proposed method was confirmed by comparing the conventional method in experiments about 48.43% current reduction. The proposed method was designed by Verilog HDL and was verified by using OpenCV and Windows Program.

Open-Loop Pipeline ADC Design Techniques for High Speed & Low Power Consumption (고속 저전력 동작을 위한 개방형 파이프라인 ADC 설계 기법)

  • Kim Shinhoo;Kim Yunjeong;Youn Jaeyoun;Lim Shin-ll;Kang Sung-Mo;Kim Suki
    • The Journal of Korean Institute of Communications and Information Sciences
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    • 제30권1A호
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    • pp.104-112
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    • 2005
  • Some design techniques for high speed and low power pipelined 8-bit ADC are described. To perform high-speed operation with relatively low power consumption, open loop architecture is adopted, while closed loop architecture (with MDAC) is used in conventional pipeline ADC. A distributed track and hold amplifier and a cascading structure are also adopted to increase the sampling rate. To reduce the power consumption and the die area, the number of amplifiers in each stage are optimized and reduced with proposed zero-crossing point generation method. At 500-MHz sampling rate, simulation results show that the power consumption is 210mW including digital logic with 1.8V power supply. And the targeted ADC achieves ENOB of about 8-bit with input frequency up to 200-MHz and input range of 1.2Vpp (Differential). The ADC is designed using a $0.18{\mu}m$ 6-Metal 1-Poly CMOS process and occupies an area of $900{\mu}m{\times}500{\mu}m$

A Study on Low Power Force-Directed scheduling for Optimal module selection Architecture Synthesis (최적 모듈 선택 아키텍쳐 합성을 위한 저전력 Force-Directed 스케쥴링에 관한 연구)

  • Choi Ji-young;Kim Hi-seok
    • Proceedings of the IEEK Conference
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    • 대한전자공학회 2004년도 하계종합학술대회 논문집(2)
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    • pp.459-462
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    • 2004
  • In this paper, we present a reducing power consumption of a scheduling for module selection under the time constraint. A a reducing power consumption of a scheduling for module selection under the time constraint execute scheduling and allocation for considering the switching activity. The focus scheduling of this phase adopt Force-Directed Scheduling for low power to existed Force-Directed Scheduling. and it constructs the module selection RT library by in account consideration the mutual correlation of parameters in which the power and the area and delay. when it is, in this paper we formulate the module selection method as a multi-objective optimization and propose a branch and bound approach to explore the large design space of module selection. Therefore, the optimal module selection method proposed to consider power, area, delay parameter at the same time. The comparison experiment analyzed a point of difference between the existed FDS algorithm and a new FDS_RPC algorithm.

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