• Proceedings of the KIPE Conference
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• 2014.11a
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• pp.66-67
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• 2014

Stabilization of the DC bus voltage is an important task in DC-AC microgrid system with renewable energy source such as solar system. A battery energy storage system (BESS) has become a general solution to stabilize the DC-bus voltage in DC-AC microgrid. This paper develops the analog BESS controller which requires neither computation nor dc-bus voltage measurement, so that the system can be implemented simply and easily. Even though others methods can stabilize and control the DC-bus voltage, it has complicated structure in control and low adaptive capability. The proposed topology is simple but is able to compensate the solar source variation and stabilize the DC-bus voltage under any loads and distributed generation (DG) conditions. In addition, the design of analog controller is presented to obtain a robust system. In order to verify the effectiveness of the proposed control strategy, simulation is carried out by using PSIM software.

• The Transactions of the Korean Institute of Power Electronics
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• v.23 no.1
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• pp.1-8
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• 2018

A problem exists in the conventional transportation cart applications, in which an external power supply with mechanical contact connection (bus bar connection) is required to drive the motor. Therefore, continuous effort for maintenance is required, aside from the expensive bus bar connector. To solve this problem, a self-electricity-generated transportation cart system without bus bar has recently been introduced. In this system, a battery needs to store the power of the generated wheel, and a boost converter, which converts the low battery voltage to high bus voltage to drive the motor inverter, is necessary. However, since the instantaneous large current required for starting the motor is supplied from the battery, a battery with large size and volume should be adopted to withstand this large current. In this study, a boost converter that can supply a large instantaneous current by using super Capacitor string is proposed. The proposed converter can be realized with a small size and volume compared with the conventional battery-fed boost converter. Operational principles, analysis, and design of the proposed converter are presented, and experimental results are provided to validate the proposed converter.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.345-348
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• 2001

In this paper, we present a effective low-power technique which can reduce significantly the switching activity in instruction address bus, pipeline and I-cache. Using this method, named Guarded Operation, we has implemented address register. address bus architecture without complex hardware and designed loop buffer without tag. These architectures reduce 67% of switching activity with little overhead and also increase instruction-fetch performance.

• Progress in Superconductivity and Cryogenics
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• v.2 no.2
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• pp.20-25
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• 2000

A CICC type superconducting bus-line electrically connecting a superconducting magnet to a power supply is cooled down to low temperature under the external magnetic field during operation. The thermal contraction during the cooling may be constrained by the supports which are installed to protect the bus-line from Lorenz magnetic forces. This constrained contraction causes thermal stresses in the bus-line to release thermal contraction. The minimum stress conditions in the bus-line may be optimized by controlling the supporting arrangement considering the thermal contraction and the external field. The analytical method to find optimal supports arrangement was suggested by using the beam theory, and numerical calculation using commercial code was performed to verify the suggested analytical optimization method.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.6 s.360
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• pp.69-76
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• 2007

A new circuit design for Bus-Invert Coding is presented in this paper. The new scheme sends the coding information through the bus-lines instead of the invert-line which has been used conventionally for many types of Bus-Invert algorithms. By employing a newly developed bus-driver called Flip-Driver and a selection circuit, it not only removes the invert-line but suppresses the additional bus-transitions in sending coding information. It is verified by simulations that the efficiency of various Bus-Invert algorithms is increased about 40% to 100% by employing the new design.

• 전자공학회논문지 IE
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• v.45 no.3
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• pp.5-12
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• 2008

We propose efficient scan testing method capable of reducing the test data and power dissipation for digital logic circuits. The proposed testing method is based on a hybrid run-length encoding which reduces test data storage on the tester. We also introduce modified Bus-invert coding method and scan cell design in scan cell reordering, thus providing increased power saving in scan in operation. Experimental results for ISCAS'89 benchmark circuits show that average power of 96.7% and peak power of 84% are reduced on the average without fault coverage degrading. We have obtained a high reduction of 78.2% on the test data compared the existing compression methods.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.2
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• pp.56-62
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• 2002

A new high speed and low voltage swing on-chip BUS using threshold voltage swing driver and dual sense amplifier receiver is proposed. The threshold voltage swing driver reduces the rising time in the bus to 30% of the full CMOS inverter driver and the dual sense amplifier receiver increases twice the throughput. of the conventional reduced-swing buses using sense amplifier receiver. With threshold voltage swing driver and dual sense amplifier receiver combined, approximately 60% speed improvement and 75% power reduction are achieved in the proposed scheme compared to the conventional full CMOS inverter for the on-chip bus.

• Journal of Power Electronics
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• v.7 no.3
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• pp.181-190
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• 2007

This paper presents a novel circuit topology of a DC bus line series switch and parallel snubbing capacitor-assisted soft-switching PWM full-bridge inverter type DC-DC power converter with a high frequency planar transformer link, which is newly developed for high performance arc welding machines in industry. The proposed DC-DC power converter circuit is based upon a voltage source-fed H type full-bridge soft-switching PWM inverter with a high frequency transformer. This DC-DC power converter has a single power semiconductor switching device in series with an input DC low side rail and loss less snubbing capacitor in parallel with the inverter bridge legs. All the active power switches in the full-bridge arms and DC bus line can achieve ZCS turn-on and ZVS turn-off transition commutation. Consequently, the total switching power losses occurred at turn-off switching transition of these power semiconductor devices; IGBTs can be reduced even in higher switching frequency bands ranging from 20 kHz to 100 kHz. The switching frequency of this DC-DC power converter using IGBT power modules can be realized at 60 kHz. It is proved experimentally by power loss analysis that the more the switching frequency increases, the more the proposed DC-DC power converter can achieve a higher control response performance and size miniaturization. The practical and inherent effectiveness of the new DC-DC converter topology proposed here is actually confirmed for low voltage and large current DC-DC power supplies (32V, 300A) for TIG arc welding applications in industry.

• The Transactions of the Korean Institute of Power Electronics
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• v.23 no.4
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• pp.265-272
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• 2018

This paper proposes a new control method for the supercapacitor (SC) to compensate the pulsed load and to enhance the power quality of the DC microgrid. By coordinating the operating frequency, the SC is controlled to handle the surge current, while the low-frequency current component is dealt with by the remaining sources in the system. The operation mode of the SC unit is automatically changed based on the state of charge and DC bus voltage level. Meanwhile, the mismatch in the power demand is covered by the SC unit by regulating the DC bus voltage level. The effectiveness of the proposed method is verified experimentally by the prototype with two distributed generators and one SC unit.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2005.05a
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• pp.283-287
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• 2005

In this paper, one general approach is proposed for the design of power system that can be applicable for next generation LEO satellite application. The power system consists of solar panels, battery, and power control and distribution unit(PCDU). The PCDU contains solar array modules, battery interface modules, low-voltage power distribution modules, high-voltage distribution modules, heater power distribution modules, on-board computer interface modules, and internal DC/DC converter modules. The PCDU plays roles of protection of battery against overcharge by active control of solar array generated power, distribution of unregulated electrical power via controlled outlets to bus and instrument units, distribution of regulated electrical power to selected bus and instrument units, and provision of status monitoring and telecommand interface allowing the system and ground operate the power system, evaluate its performance and initiate appropriate countermeasures in case of abnormal conditions. We review the functional schemes of the main constitutes of the PCDU such as the battery interface module, the auxiliary supply module, solar array regulators with maximum power point tracking(MPPT) technology, heater power distribution modules, spacecraft unit power distribution modules, and instrument power distribution module.