• Title/Summary/Keyword: Low-k wafer

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A Low Memory Bandwidth Motion Estimation Core for H.264/AVC Encoder Based on Parallel Current MB Processing (병렬처리 기반의 H.264/AVC 인코더를 위한 저 메모리 대역폭 움직임 예측 코어설계)

  • Kim, Shi-Hye;Choi, Jun-Rim
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.2
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    • pp.28-34
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    • 2011
  • In this paper, we present integer and fractional motion estimation IP for H.264/AVC encoder by hardware-oriented algorithm. In integer motion engine, the reference block is used to share for consecutive current macro blocks in parallel processing which exploits data reusability and reduces off-chip bandwidth. In fractional motion engine, instead of two-step sequential refinement, half and quarter pel are processed in parallel manner in order to discard unnecessary candidate positions and double throughput. The H.264/AVC motion estimation chip is fabricated on a MPW(Multi-Project Wafer) chip using the chartered $0.18{\mu}m$ standard CMOS 1P5M technology and achieves high throughput supporting HDTV 720p 30 fps.

The microstructure of polycrystalline silicon thin film that fabricated by DC magnetron sputtering

  • Chen, Hao;Park, Bok-Kee;Song, Min-Jong;Park, Choon-Bae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.332-333
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    • 2008
  • DC magnetron sputtering was used to deposit p-type polycrystalline silicon on n-type Si(100) wafer. The influence of film microstructure properties on deposition parameters (DC power, substrate temperature, pressure) was investigated. The substrate temperature and pressure have the important influence on depositing the poly-Si thin films. Smooth ploy-Si films were obtained in (331) orientation and the average grain sizes are ranged in 25-30nm. The grain sizes of films deposited at low pressure of 10mTorr are a little larger than those deposited at high pressure of 15mTorr.

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A Study on Recycling Technology of EC for Semiconductor and LCD PR Stripping Process (반도체/LCD PR 제거용 EC의 재이용 기술에 관한 연구)

  • Moon, Se-Ho;Chai, Sang-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.10
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    • pp.25-30
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    • 2009
  • We have developed recycling technology of ethylen carbonate to use in photoresist stripping and cleaning process, which will be core processing technology for high performance and low price semiconductor and LCD fabrication. Using this technology, it is possible for semiconductor wafer and LCD planer to process more rapid and chip, and productivity will be improved.

Invention of Ultralow - n SiO2 Thin Films

  • Dung, Mai Xuan;Lee, June-Key;Soun, Woo-Sik;Jeong, Hyun-Dam
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.281-281
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    • 2010
  • Very low refractive index (<1.4) materials have been proved to be the key factor improving the performance of various optical components, such as reflectors, filters, photonic crystals, LEDs, and solar cell. Highly porous SiO2 are logically designed for ultralow refractive index materials because of the direct relation between porosity and index of refraction. Among them, ordered macroporous SiO2 is of potential material since their theoretically low refractive index ~1.10. However, in the conventional synthesis of ordered macroporous SiO2, the time required for the crystallization of organic nanoparticles, such as polystyrene (PS), from colloidal solution into well ordered template is typical long (several days for 1 cm substrate) due to the low interaction between particles and particle - substrate. In this study, polystyrene - polyacrylic acid (PS-AA) nanoparticles synthesized by miniemulsion polymerization method have hydrophilic polyacrylic acid tails on the surface of particles which increase the interaction between particle and with substrate giving rise to the formation of PS-AA film by simply spin - coating method. Less ordered with controlled thickness films of PS-AA on silicon wafer were successfully fabricated by changing the spinning speed or concentration of colloidal solution, as confirmed by FE-SEM. Based on these template films, a series of macroporous SiO2 films whose thicknesses varied from 300nm to ~1000nm were fabricated either by conventional sol - gel infiltration or gas phase deposition followed by thermal removal of organic template. Formations of SiO2 films consist of interconnected air balls with size ~100 nm were confirmed by FE-SEM and TEM. These highly porous SiO2 show very low refractive indices (<1.18) over a wide range of wavelength (from 200 to 1000nm) as shown by SE measurement. Refraction indices of SiO2 films at 633nm reported here are of ~1.10 which, to our best knowledge, are among the lowest values having been announced.

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Transfer-Free, Large-Scale, High-Quality Monolayer Graphene Grown Directly onto the Ti (10 nm)-buffered Substrates at Low Temperatures (Ti (10 nm)-buffered 기판들 위에 저온에서 직접 성장된 무 전사, 대 면적, 고 품질 단층 그래핀 특성)

  • Han, Yire;Park, Byeong-Ju;Eom, Ji-Ho;Yoon, Soon-Gil
    • Korean Journal of Materials Research
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    • v.30 no.3
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    • pp.142-148
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    • 2020
  • Graphene has attracted the interest of many researchers due to various its advantages such as high mobility, high transparency, and strong mechanical strength. However, large-area graphene is grown at high temperatures of about 1,000 ℃ and must be transferred to various substrates for various applications. As a result, transferred graphene shows many defects such as wrinkles/ripples and cracks that happen during the transfer process. In this study, we address transfer-free, large-scale, and high-quality monolayer graphene. Monolayer graphene was grown at low temperatures on Ti (10nm)-buffered Si (001) and PET substrates via plasma-assisted thermal chemical vapor deposition (PATCVD). The graphene area is small at low mTorr range of operating pressure, while 4 × 4 ㎠ scale graphene is grown at high working pressures from 1.5 to 1.8 Torr. Four-inch wafer scale graphene growth is achieved at growth conditions of 1.8 Torr working pressure and 150 ℃ growth temperature. The monolayer graphene that is grown directly on the Ti-buffer layer reveals a transparency of 97.4 % at a wavelength of 550 nm, a carrier mobility of about 7,000 ㎠/V×s, and a sheet resistance of 98 W/□. Transfer-free, large-scale, high-quality monolayer graphene can be applied to flexible and stretchable electronic devices.

Design of a 40 channel SQUID system (40채널 SQUID 시스템의 설계)

  • Lee, Y.H.;Kim, J.M.;Kwon, H.C.;Lim, C.M.;Lee, S.K.;Park, Y.K.;Park, J.C.;Lee, D.H.;Shin, J.K.;Ahn, C.B.;Park, M.S.;Hur, Y.;Hong, J.B.
    • Proceedings of the KOSOMBE Conference
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    • v.1998 no.11
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    • pp.191-192
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    • 1998
  • We report on the design of a low-noise 40 channel SQUID system for biomagnetism. We used low-noise SQUID sensor with the pickup coil integrated on the same wafer as the SQUID. The SQUID electronics were simplified by increasing the voltage output of the SQUID. The SQUID insert was designed to have low thermal load, minimizing the liquid helium loss. The digital signal processing provides versatile analysis tools and the software is based on the object-oriented programming. For the effective localization of the source location, solutions of the inverse problems based on the lead-field and the simulated anneal ins were studied.

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Comparative Study of surface passivation for Metamorphic HEMT using low-k Benzocyclobutene(BCB) (Metamorphic HEMT에서 low-k Benzocyclobutene(BCB)를 이용한 표면 passivation 비교 연구)

  • Baek, Yong-Hyun;Oh, Jung-Hun;Han, Min;Choi, Seok-Gyu;Lee, Bok-Hyung;Lee, Seong-Dae;Rhee, Jin-Koo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.4
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    • pp.80-85
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    • 2007
  • The passivation is one of the important technologies for protection of the devies from damage. In this paper, we fabricated $0.1{\mu}m\;{\Gamma}$--gate InAIAs/InGaAs metamorphic high electron mobility transistors (MHEMTs) on a GaAs substrate. And then the wafer with MHEMTs was divided into two pieces; one for passivation and another for without passivation experiments. The passivations were done by using both low-k BCB and Si3N4 thin films. DC and RF performances were measured and the results are compared. The MHEMTs with BCB passivation show lower degradation than ones with Si3N4 passivation.

Low-resistance ohmic contacts to p-$Hg_{0.7}$$Cd_{0.3}$Te (p-$Hg_{0.7}$$Cd_{0.3}$Te에 낮은 저항의 접촉을 얻는 방법에 대한 연구)

  • Kim, Kwan;Chung, Han;Kim, Sung-Chul;Lee, Hee-Chul;Kim, Choong-Ki;Kim, Hong-Kook;Kim, Jae-Mook
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.10
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    • pp.87-93
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    • 1994
  • Ohmic contacts between Au and p-HgHg_{0.7}Cd_{0.3}Te$ with low specific contact resistance have been obtained. The contact region of the wafer is first pre-heated for 5 seconds in a rapid thermal processing equipment. The temperature reaches a maximum value of about 200$^{\circ}C$ at the end of the 5 seconds. Next, a thin Au film is formed on the contact region by immersing the sample in AuCl$_{3}$ solution. the sample is then post-annealed in the same condition as the pre-heating after Pb/In pad metals are deposited on the electroless Au contacts. The specific contact resistance measured by transmission line model is 5${\times}10^{-3}{\Omega}cm^{2}$ at 80K. RBS and differential Hall measurement data suggest that the above low resistance ohmic contact is ascribed to surface traps and increased gold diffusion rate.

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Study on Surface Damage of Specimen for Transmission Electron Microscopy(TEM) Using Focused Ion Beam(FIB) (집속 이온빔을 이용한 투과 전자 현미경 시편의 표면 영향에 관한 연구)

  • Kim, Dong-Sik
    • 전자공학회논문지 IE
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    • v.47 no.2
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    • pp.8-12
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    • 2010
  • TEM is a powerful tool for semiconductor material analyses in structure or biological sample in micro structure. TEM observation need to make to coincide specimens for special purpose. in this paper, we have experimented for minimum surface damage on bulk wafer and patterned specimen by various conditions such as accelerating energy, depth of ion beam, ion milling types, and etc. in various specimen preparation methods by FIB (Focus Ion Beam). The optimal qualified specimens are contain low mounts of surface damage(about 5 nm) on patterned specimen.

The Substrate Effects on Kinetics and Mechanism of Solid-Phase Crystallization of Amorphous Silicon Thin Films

  • Song, Yoon-Ho;Kang, Seung-Youl;Cho, Kyoung-Ik;Yoo, Hyung-Joun
    • ETRI Journal
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    • v.19 no.1
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    • pp.26-35
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    • 1997
  • The substrate effects on solid-phase crystallization of amorphous silicon (a-Si) films deposited by low-pressure chemical vapor deposition (LPCVD) using $Si_2H_6$ gas have been extensively investigated. The a-Si films were prepared on various substrates, such as thermally oxidized Si wafer ($SiO_2$/Si), quartz and LPCVD-oxide, and annealed at 600$^{\circ}C$ in an $N_2$ ambient for crystallization. The crystallization behavior was found to be strongly dependent on the substrate even though all the silicon films were deposited in amorphous phase. It was first observed that crystallization in a-Si films deposited on the $SiO_2$/Si starts from the interface between the a-Si and the substrate, so called interface-interface-induced crystallization, while random nucleation process dominates on the other substrates. The different kinetics and mechanism of solid-phase crystallization is attributed to the structural disorderness of a-Si films, which is strongly affected by the surface roughness of the substrates.

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