• 반도체디스플레이기술학회지
• /
• 제9권3호
• /
• pp.5-9
• /
• 2010

Recently, the important issues of solar cell are low cost and high efficiency. Making low cost and high efficiency solar cell, there are many effects to development of inexpensive wafer, simplify process and improve optical, electrical properties. In this the study, the 2 step texturing method using micro blaster was developed to decrease reflection of incident lights. Air bridge electrode structure is suggested to expand the effective surface area and decrease the series resistance of finger electrode. The effects of 1 step texturing and 2 step texturing by micro blaster are compared. Reflectance of 1 step and 2 step texturing are measured 28.7% and 25.5%, respectively. The reflectance of 2 step texturing sample is lower about 3.2% than 1 step textured sample.

• 한국재료학회지
• /
• 제25권9호
• /
• pp.487-491
• /
• 2015

In photovoltaic power generation where minority carrier generation via light absorption is competing against minority carrier recombination, the substrate thickness and material quality are interdependent, and appropriate combination of the two variables is important in obtaining the maximum output power generation. Medici, a two-dimensional semiconductor device simulation tool, is used to investigate the interdependency in relation to the maximum power output in front-lit Si solar cells. Qualitatively, the results indicate that a high quality substrate must be thick and that a low quality substrate must be thin in order to achieve the maximum power generation in the respective materials. The dividing point is $70{\mu}m/5{\times}10^{-6}sec$. That is, for materials with a minority carrier recombination lifetime longer than $5{\times}10^{-6}sec$, the substrate must be thicker than $70{\mu}m$, while for materials with a lifetime shorter than $5{\times}10^{-6}sec$, the substrate must be thinner than $70{\mu}m$. In substrate fabrication, the thinner the wafer, the lower the cost of material, but the higher the cost of wafer fabrication. Thus, the optimum thickness/lifetime combinations are defined in this study along with the substrate cost considerations as part of the factors to be considered in material selection.

• 한국진공학회지
• /
• 제19권5호
• /
• pp.391-396
• /
• 2010

실리콘 태양전지의 pn 접합 계면특성을 조사하기 위해서 p형 실리콘 기판 위에 전기로를 이용한 $POCl_3$ 공정을 통하여 n형의 불순물을 주입하여 pn 접합을 만들었다. n형 불순물의 확산되어 들어가는 공정시간이 길고 공정온도가 높을수록 면저항은 줄어들었다. n형 불순물의 주입이 많아질수록 pn 접합 계면에서의 전자친화도가 줄어들면서 면저항은 감소되었다. 면저항이 줄어든 이유는 pn 접합계면에서 전자홀쌍이 생성되면서 이동길이가 길어지고 재결합률이 감소하였기 때문이다. n형의 불순물 확산공정시간이 긴 태양전지 셀에서 F.F. 계수가 높게 나타났으며, 효율도 높게 나타났다.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2006년도 전력전자학술대회 논문집
• /
• pp.470-474
• /
• 2006

This dissertation discuses about a ferrite core plasma source using low operating frequency without sputtering problem by the stored electric field. Compared with the conventional RF power system with 13.56MHz switching frequency, the proposed plasma power system is only separated at 400kHz, so that it makes possible to use of low cost switching elements, PWM control and soft switching. Moreover, it could improve the coupling efficiency for plasma and antenna by using the ferrite core in order to transfer the energy of the load This dissertation tried to analyze new plasma generation method for the plasma generation system by modeling the plasma load and grafting the concept of impedance matching in order to interpret it with the formula This dissertation verified the ferrite core inductive coupling plasma source authorized for 400kHz of low frequency power by applying to the semi-conductor ash process thru the measurement of ash capacity and uniformed plasma distribution on the actual wafer.

• Macromolecular Research
• /
• 제12권1호
• /
• pp.78-84
• /
• 2004

Advanced epoxy molding compounds (EMCs) should be considered to alleviate the thermal stress problems caused by low thermal conductivity and high elastic modulus of an EMC and by the mismatch of the coefficient of thermal expansion (CTE) between an EMC and the Si-wafer. Though A1N has some advantages, such as high thermal conductivity and mechanical strength, an A1N-filled EMC could not be applied to commercial products because of its low fluidity and high modules. To solve this problem, we used 2-$\mu\textrm{m}$ fused silica, which has low porosity and spherical shape, as a small size filler in the binary mixture of fillers. When the composition of the silica in the binary filler system reached 0.3, the fluidity of EMC was improved more than twofold and the mechanical strength was improved 1.5 times, relative to the 23-$\mu\textrm{m}$ A1N-filled EMC. In addition, the values of the elastic modules and the dielectric constant were reduced to 90％, although the thermal conductivity of EMC was reduced from 4.3 to 2.5 W/m-K, when compared with the 23-$\mu\textrm{m}$ A1N-filled EMC. Thus, the A1N/silica (7/3)-filled EMC effectively meets the requirements of an advanced electronic packaging material for commercial products, such as high thermal conductivity (more than 2 W/m-K), high fluidity, low elastic modules, low dielectric constant, and low CTE.

• 한국정밀공학회:학술대회논문집
• /
• 한국정밀공학회 2006년도 춘계학술대회 논문집
• /
• pp.155-156
• /
• 2006

UV-NIL is a promising technology for the fabrication of sub-100 nm features. Due to non-uniformity of the residual layer thickness (RLT) and a strong possibility of defects, many UV-NIL processes have been developed and some are commercially available at present, most are based on the 'step-and-repeat' nanoimprint technique, which employs a small-area stamp, much smaller than the substrate. This is mainly because, when a large-area stamp is used, it is difficult to obtain acceptable uniform residual layer thickness and/or to avoid defects such as air entrapment. As an attempt to enable UV_NIL with a large-area stamp for high throughput, we propose a new UV-NIL tool that is able to imprint 4 inch wafer in a low vacuum environment at a single step.

• 한국정보통신학회:학술대회논문집
• /
• 한국정보통신학회 2012년도 추계학술대회
• /
• pp.586-589
• /
• 2012

In this paper, a tunable capacitor like an interdigital one is presented for low-voltage applications. In order to reduce operation voltage by enhancing fringing electric fields, two finger-patterned electrodes are vertically separated by employing a multi-layer thin film dielectric of a para-/ferro-/para-electrics without spacing between electrodes. The proposed tunable capacitor was fabricated on a quartz wafer and its characteristics are analyzed in terms of effective capacitance and tunability with a function of applied voltages, compared to the conventional interdigital capacitor (IDC). At 8V and 2 GHz, the proposed tunable capacitor shows the tunability of 18 % that is 10.3 % higher than that of the compared one.

• Applied Science and Convergence Technology
• /
• 제23권4호
• /
• pp.169-178
• /
• 2014

Fluid model based numerical analysis is done to simulate a low damage etch back system for 20 nm scale semiconductor fabrication. Etch back should be done conformally with very high material selectivity. One possible mechanism is three steps: reactive radical generation, adsorption and thermal desorption. In this study, plasma generation and transport steps are analyzed by a commercial plasma modeling software package, CFD-ACE+. Ar + $CF_4$ ICP was used as a model and the effect of reactive gas inlet position was investigated in 2D and 3D. At 200~300 mTorr of gas pressure, separated gas inlet scheme is analyzed to work well and generated higher density of F and $F_2$ radicals in the lower chamber region while suppressing ions reach to the wafer by a double layer conducting barrier.

• 전기전자학회논문지
• /
• 제16권4호
• /
• pp.405-409
• /
• 2012

In this paper, on-chip antennas applicable to ultra low power wireless transceiver are designed and evaluated. Using $0.18{\mu}m$ SiGe MMIC process, 4 types of antenna with $1{\times}1mm^2$ dimensions are fabricated. The on-wafer measurement in a microwave probe station is conducted to measure the input VSWR and antenna performance of the designed on-chip antenna. Performance evaluation results show that developed antennas can be easily integrated into one-chip RF transceiver for ubiquitous applications, including WPAN and human body communications.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
• /
• pp.181.2-181.2
• /
• 2015

Sputtering is one of the most popular physical deposition methods due to their versatility and reproducibility. Synthesis of Cr thin films by DC magnetron sputtering using glancing angle deposition (GLAD) has been reported. Chromium thin films have been prepared at two different working pressure($2.0{\times}10-2$, 30, $3.3{\times}10-3torr$) on Si-wafer substrate using magnetron sputtering with glancing angle deposition (GLAD) technique. The thickness of Cr thin films on the substrate was adjusted about 1 mm. The electrical property was measured by four-point probe method. For the measurement of density in the films, an X-ray reflectivity (XRR) was carried out. The sheet resistance and column angle increased with the increase of glancing angle. However, nanohardness and density of Cr thin films decreased as the glancing angle increased. The measured density for the Cr thin films decreased from 6.1 to 3.8 g/cc as the glancing angle increased from $0^{\circ}$ to $90^{\circ}$ degree. The low density of Cr thin films is resulted from the isolated columnar structure of samples. The evolution of the isolated columnar structure was enhanced at the conditions of low sputter pressure and high glancing angle. This GLAD technique can be potentially applied to the synthesis of thin films requiring porous and uniform coating such as thin film catalysts or gas sensors.