• KIEE International Transactions on Electrophysics and Applications
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• v.2C no.6
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• pp.292-296
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• 2002

A new sustain driving method for the AC PDP is presented. In this driving method, the voltage source is connected to a storage capacitor, this storage capacitor charges an intermediate capacitor through LC resonance, and the panel is charged from the intermediate capacitor indirectly. In this way, the current flowing into the AC PDP when the sustain discharge occurs is reduced because the current is indirectly supplied from a capacitor, a limited source of charge. Thus, the input power to the output luminance efficiency is improved. Since the voltage supplied to the storage capacitor is doubled through LC resonance, this method call drive an AC PDP with a voltage source of about half of the voltage necessary in the conventional driving methods. The experiments showed that this charge-controlled driving method could drive ail AC PDP with a voltage source of as low as 107V. Using a panel of the conventional structure, luminous efficiency of 1.28 lm/W was achieved.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1402-1404
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• 2009

The silicon nitride films for gate dielectric were deposited by catalytic chemical vapor deposition at low temperature (${\leq}200^{\circ}C$). The mixture of $SiH_4$, $NH_3$ and $H_2$ was used as source gases. The current-voltage (I-V) and the capacitance-voltage (C-V) characteristics of the films were measured. The breakdown voltage and the flat band voltage shift of samples were improved by increase of the $NH_3$ contents and $H_2$ dilution ratio. The defect states were analyzed by photoluminescence (PL) spectra. As the defect states decreased, the breakdown voltage and the flat band voltage shift increased.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1746-1751
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• 2015

In this study low voltage Plasma Electrolytic Oxidation (PEO) was utilized to eliminate high voltage PEO drawbacks such as high cost, dimensional deformation and porosity. Low voltage PEO produces a thin coating which causes low corrosion resistance. In order to solve such problem, 0.1~0.6M pyrophosphates were added in a bath containing 1.4M NaOH, and 0.35M Na₂SiO₃. 70 V PEO was conducted at 25℃ for 3 minutes. Chemical composition, morphology and corrosion resistance of the anodized coating were analyzed. The anodized film was composed of MgO, Mg₂SiO₄, and Mg₂O₇P₂. The morphology of film showed appropriately dense structure and low porosity in the anodized layers. It is found that low voltage Plasma Electrolytic Oxidation in cooperation with phosphating treatment can provide a good corrosion protection for the AZ31B magnesium alloy.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.59 no.4
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• pp.473-476
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• 2010

In this paper, we analyzed the short circuit current of a low voltage direct current distribution system. For the analysis, we performed the modeling of the low voltage direct current distribution system with a 6-pulse three-phase thyristor rectifier using the PSCAD/EMTDC, surveyed impedance of sources, transformers and distribution lines to run a simulation. A result of the simulation is that short circuit currents of the direct current distribution system with the rectifier decreased due to a thyristor-ON-resistance(Ron). But in case of the low thyristor-ON resistance, output fault current of the rectifier increased over three-phase short circuit current of an AC power system without a rectifier by regular ratio of the rectifier. Because the output fault current of the rectifier can increase over interrupting the capacity of circuit breakers, studying short circuit currents of a low voltage direct current distribution system with a rectifier is necessary for introducing the direct current distribution systems.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.22 no.3
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• pp.1-7
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• 2008

We have theoretically investigated the asymmetry effects on 10[Gb/s] optical duobinary transmitters from the viewpoint of the driving voltage ratios by computer simulations. For driving voltage ratios(=driving voltage/switching voltage) with smaller than 100[%], the transmission performance has been greatly affected by the asymmetry of the bandwidth of LPFs than that of the Mach-Zehnder Modulator driving voltage. On the other hand, for driving voltage ratios with 100[%], the transmission performance has been degraded by the asymmetry of the driving voltage and is not sensitive to that of the bandwidth of LPFs. For the transmission performance within 1[dB] power penalty under the asymmetry condition, the driving voltage ratio with 100[%] has performed better than the low driving voltage ratios.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.731-734
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• 2005

In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD (Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low power consumption at the same time. Maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps. And Zener Triggered SCR devices to protect the ESD phenomenon were designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 5.8V. Finally, we performed the layout high speed I/O interface circuit with the low triggered ESD protection device in one-chip.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.10
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• pp.713-719
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• 2013

Power MOSFET operate voltage-driven devices, design to control the large power switching device for power supply, converter, motor control, etc. We have optimal designed planar and trench gate power MOSFET for high breakdown voltage and low on resistance. When we have designed $6,580{\mu}m{\times}5,680{\mu}m$ of chip size and 20 A current, on resistance of trench gate power MOSFET was low than planar gate power MOSFET. The on state voltage of trench gate power MOSFET was improved from 4.35 V to 3.7 V. At the same time, we have designed unified field limit ring for trench gate power MOFET. It is Junction Termination Edge type. As a result, we have obtained chip shrink effect and low on resistance because conventional field limit ring was convert to unify.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.05a
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• pp.330-334
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• 1999

This paper presents a new transient voltage blocking device (TBD) for commucation facilities with low power and high frequency bandwidth. Conventional protection devices have some problems such as low frequency bandwidth, low energy capacity and high remnant voltage. In order to improve these limitations, the new TBD, which consists of a gas tube, avalanche diodes and junction type field effect transistors (JFETs), was designed and fabricated JFETs were used as an active non-linear element and a high speed switching diode with low capacitance limits high current. Therefore the avalanche diodes with low energy capacity are protected from the high current, and the TBD has a very small input capacitance. From the performance test using surge generator, which can produce 1.2/50${\mu}\textrm{s}$ 4.2 k$V_{max}$, 8/20${\mu}\textrm{s}$ 2.1 kA$\sub$max/, it is confirmed that the proposed TBD has an excellent protection performance in tight clamping voltage and limiting current characteristics.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.257-260
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• 2000

In this paper, a Gm-C filter for low voltage and low power applications using a fully-differential transconductor is presented. The designed transconductor using the series composite transistors and the low voltage composite transistors has wide input range at low supply voltage. A negative resistor load (NRL) technology for high DC gain of the transconductor is employed with a common mode feedback (CMFB). As a design example, the third-order Elliptic lowpass filter is designed. The designed filter is simulated and examined by HSPICE using 0.25${\mu}{\textrm}{m}$ CMOS n-well parameters. The simulation results show 105MHz cutoff frequency and 2.4㎽ power dissipation with a 2.5V supply voltage.

• Journal of Power Electronics
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• v.6 no.1
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• pp.83-93
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• 2006

A new high efficiency and low profile on-board DC/DC converter for digital car audio amplifiers is proposed. The proposed converter shows low conduction loss due to the low voltage stress of the secondary diodes, a lack of DC magnetizing current for the transformer, and a lack of stored energy in the transformer. Moreover, since the primary MOSFETs are turned-on under zero-voltage-switching (ZVS) conditions and the secondary diodes are turned-off under zero-current-switching (ZCS) conditions, the proposed converter has minimized switching losses. In addition, the input filter can be minimized due to a continuous input current, and an output inductor is absent in the proposed converter. Therefore, the proposed converter has the desired features, high efficiency and low profile, for a viable power supply for digital car audio amplifiers. A 60W industrial sample of the proposed converter has been implemented for digital car audio amplifiers with a measured efficiency of $88.3\%$ at nominal input voltage.