• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.6
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• pp.1-8
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• 2016

Current sensors are used widely in the fields of current control, monitoring, and measuring. They have become more popular with the increasing demand for smart grids in a power network, generation of renewable energy, electric cars, and hybrid cars. Although open loop Hall effect current sensors have merits, such as low cost, small size, and weight, they have low accuracy. This paper describes the design and fabrication of a 300A open loop current sensor that has high accuracy and temperature performance. The core of the current sensor was calculated numerically and the signal conditioning circuits were designed using circuit analysis software. The characteristics of the manufactured open loop current sensor of 300 A class was measured at currents up to 300 A. According to the test of the current sensor, the accuracy error and linearity error were 0.75% and 0.19%, respectively. When the temperature compensation was carried out with the relevant circuit, the temperature coefficients were less than $0.012%/^{\circ}C$ at temperatures between $-25^{\circ}C$ and $85^{\circ}C$.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.8 no.4
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• pp.640-644
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• 1998

We have fabricated Sb/SiC(4H) Schottky barrier diode (SBD) of which characteristics compared with that of Ti/SiC(4H) SBD. The donor concentration of the n-type SiC(4H) obtained by capacitance-voltage (C-V) measurement was about $2.5{\times}10 ^{17}{\textrm}cm^{-3}$. The ideality factors of 1.31 was obtained from the slope of forward current-voltage (I-V) characteristics of Sb/SiC(4H) SBD at low current density. The breakdown field of Sb/SiC(4H) SBD under the reverse bias voltage was about $4.4{\times}10^2V$/cm. The built-in potential and the Schottky barrier height (SBH) of Sb/SiC(4H) SBD were 1.70V and 1.82V, respectively, which were determined by the analysis of C-V characteristics. The Sb/SiC(4H) SBH of 1.82V was higher than Ti/SiC(4H) SBH of 0.91V. However, the current density and reverse breakdown field of Sb/SiC(4H) were low as compared with those of Ti/SiC(4H). The Sb/SiC(4H), as well as the Ti/SiC(4H), can be utilized as the Shottky barrier contact for the high-power electronic device.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.15 no.11
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• pp.6432-6439
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• 2014

The NAUT (Non-contact Air coupled Ultrasonic Testing) technique is one of the ultrasonic testing methods that enables non-contact ultrasonic testing by compensating for the energy loss caused by the difference in acoustic impedance of air with an ultrasonic pulser receiver, PRE-AMP and high-sensitivity transducer. As the NAUT is performed in a state of steady ultrasonic transmission and reception, testing can be performed on materials of high or low temperatures or specimens with a rough surface or narrow part, which could not have been tested using the conventional contact-type testing technique. For this study, the internal defects of spot weld, which are often applied to auto parts, and CFRP parts, were tested to determine if it is practical to make the NAUT technique commercial. As the spot welded part had a high ultrasonic transmissivity, the result was shown as red. On the other hand, the part with an internal defect had a layer of air and low transmissivity, which was shown as blue. In addition, depending on the PRF (Pulse Repetition Frequency), an important factor that determines the measurement speed, the color sharpness showed differences. With the images obtained from CFRP specimens or an imaging device, it was possible to identify the shape, size and position of the internal defect within a short period of time. In this paper, it was confirmed in the above-described experiment that both internal defect detection and image processing of the defect could be possible using the NAUT technique. Moreover, it was possible to apply NAUT to the detection of internal defects in the spot welded parts or in CFRP parts, and commercialize its practical application to various fields.

• Journal of KIISE:Computing Practices and Letters
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• v.14 no.4
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• pp.378-388
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• 2008

Flash memory has been attracting attention as the next mass storage media for mobile computing systems such as notebook computers and UMPC(Ultra Mobile PC)s due to its low power consumption, high shock and vibration resistance, and small size. A storage system with flash memory excels in random read, sequential read, and sequential write. However, it comes short in random write because of flash memory's physical inability to overwrite data, unless first erased. To overcome this shortcoming, we propose an SSD(Solid State Disk) architecture with two novel features. First, we utilize non-volatile FRAM(Ferroelectric RAM) in conjunction with NAND flash memory, and produce a synergy of FRAM's fast access speed and ability to overwrite, and NAND flash memory's low and affordable price. Second, the architecture categorizes host write requests into small random writes and large sequential writes, and processes them with two different buffer management, optimized for each type of write request. This scheme has been implemented into an SSD prototype and evaluated with a standard PC environment benchmark. The result reveals that our architecture outperforms conventional HDD and other commercial SSDs by more than three times in the throughput for random access workloads.

• Korean Journal of Optics and Photonics
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• v.16 no.3
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• pp.248-253
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• 2005

We designed and fabricated a compact multi-mode interference (MMI) wavelength demultiplexer using the concept of 'Improved Quasi-State' modes. The output power and extinction ratio were improved by utilizing modal phase error which is specially occurred in low-index contrast. For a designed demultiplexer, the mode propagation analysis with effective index approximation shows significant improvement of extinction ratio to -25 dB for both $1.31{\mu}m\;and\;1.51{\mu}m$ wavelength region and the split-length was reduced about 1/5 of other MMI devices. The fabricated device shows successful characteristics for both 1.31 and $1.55{\mu}m$ wavelengths. These results demonstrate the potential of low-index materials system and the embossing process for photonic integrated circuits.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.12
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• pp.2783-2790
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• 2010

In this paper, we first review LDPC codes in general and a belief propagation algorithm that works in logarithm domain. LDPC codes, which is chosen 802.11n for wireless local access network(WLAN) standard, require a large number of computation due to large size of coded block and iteration. Therefore, we presented three kinds of low computational algorithms for LDPC codes. First, sequential decoding with partial group is proposed. It has the same H/W complexity, and fewer number of iterations are required with the same performance in comparison with conventional decoder algorithm. Secondly, we have apply early stop algorithm. This method reduces number of unnecessary iterations. Third, early detection method for reducing the computational complexity is proposed. Using a confidence criterion, some bit nodes and check node edges are detected early on during decoding. Through the simulation, we knew that the iteration number are reduced by half using subset algorithm and early stop algorithm is reduced more than one iteration and computational complexity of early detected method is about 30% offs in case of check node update, 94% offs in case of check node update compared to conventional scheme. The LDPC decoder have been implemented in Xilinx System Generator and targeted to a Xilinx Virtx5-xc5vlx155t FPGA. When three algorithms are used, amount of device is about 45% off and the decoding speed is about two times faster than convectional scheme.

• Journal of IKEEE
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• v.19 no.2
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• pp.193-200
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• 2015

In this paper, we propose the radiation measuring algorithm and the device composition using CMOS image sensor. The radiation measuring algorithm using CMOS image sensor is based on the radiation particle distinguishing algorithm projected to the CMOS image sensor and accumulated and average number of pixels of the radiation particles projected to dozens of images per second with CMOS image sensor. The radiation particle distinguishing algorithm projected to the CMOS image sensor measures the radiation particle images by dividing them into R, G and B and adjusting the threshold value that distinguishes light intensity and background from the particle of each image. The radiation measuring algorithm measures radiation with accumulated and average number of radiation particles projected to dozens of images per second with CMOS image sensor according to the preset cycle. The hardware devices to verify the suggested algorithm consists of CMOS image sensor and image signal processor part, control part, power circuit part and display part. The test result of radiation measurement using the suggested CMOS image sensor is as follows. First, using the low-cost CMOS image sensor to measure radiation particles generated similar characteristics to that from measurement with expensive GM Tube. Second, using the low-cost CMOS image sensor to measure radiation presented largely similar characteristics to the linear characteristics of expensive GM Tube.

• Journal of Software Assessment and Valuation
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• v.15 no.2
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• pp.111-119
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• 2019

The existing smart grid device authentication system is concentrated on DCU, meter reading FEP and MDMS, and the authentication system for smart meters is not established. Although some cryptographic chips have been developed at present, it is difficult to complete the PKI authentication scheme because it is at the low level of simple encryption. Unlike existing power grids, smart grids are based on open two-way communication, increasing the risk of accidents as information security vulnerabilities increase. However, PKI is difficult to apply to smart meters, and there is a possibility of accidents such as system shutdown by sending manipulated packets and sending false information to the operating system. Issuing an existing PKI certificate to smart meters with high hardware constraints makes authentication and certificate renewal difficult, so an ultra-lightweight password authentication protocol that can operate even on the poor performance of smart meters (such as non-IP networks, processors, memory, and storage space) was designed and implemented. As a result of the experiment, lightweight cryptographic authentication protocol was able to be executed quickly in the Cortex-M3 environment, and it is expected that it will help to prepare a more secure authentication system in the smart grid industry.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.58-68
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• 2006

This work proposes a 10b 250MS/s $1.8mm^2$ 85mW 0.13um CMOS A/D Converter (ADC) for high-performance integrated systems such as next-generation DTV and WLAN simultaneously requiring low voltage, low power, and small area at high speed. The proposed 3-stage pipeline ADC minimizes chip area and power dissipation at the target resolution and sampling rate. The input SHA maintains 10b resolution with either gate-bootstrapped sampling switches or nominal CMOS sampling switches. The SHA and two MDACs based on a conventional 2-stage amplifier employ optimized trans-conductance ratios of two amplifier stages to achieve the required DC gain, bandwidth, and phase margin. The proposed signal insensitive 3-D fully symmetric capacitor layout reduces the device mismatch of two MDACs. The low-noise on-chip current and voltage references can choose optional off-chip voltage references. The prototype ADC is implemented in a 0.13um 1P8M CMOS process. The measured DNL and INL are within 0.24LSB and 0.35LSB while the ADC shows a maximum SNDR of 54dB and 48dB and a maximum SFDR of 67dB and 61dB at 200MS/s and 250MS/s, respectively. The ADC with an active die area of $1.8mm^2$ consumes 85mW at 250MS/s at a 1.2V supply.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.8 no.4
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• pp.599-604
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• 1998

We have investigated Pt and $RuO_2$ as a bottom electrode for ferroelectric capacitor applications. The bottom electrodes were prepared by using an RF magnetron sputtering method. Some of the investigated parameters were a substrate temperature, gas flow rate, RF power for the film growth, and post annealing effect. The substrate temperature strongly influenced the surface morphology and resistivity of the bottom electrodes as well as the film crystallographic structure. XRD results on Pt films showed a mixed phase of (111) and (200) peak for the substrate temperature ranged from RT to $200^{\circ}C$, and a preferred (111) orientation for $300^{\circ}C$. From the XRD and AFM results, we recommend the substrate temperature of $300^{\circ}C$ and RF power 80W for the Pt bottom electrode growth. With the variation of an oxygen partial pressure from 0 to 50%, we learned that only Ru metal was grown with 0~5% of $O_2$ gas, mixed phase of Ru and $RuO_2$ for $O_ 2$ partial pressure between 10~40%, and a pure $RuO_2$ phase with $O_2$ partial pressure of 50%. This result indicates that a double layer of $RuO_2/Ru$ can be grown in a process with the modulation of gas flow rate. Double layer structure is expected to reduce the fatigue problem while keeping a low electrical resistivity. As post anneal temperature was increased from RT to $700^{\circ}C$, the resistivity of Pt and $RuO_2$ was decreased linearly. This paper presents the optimized process conditions of the bottom electrodes for memory device applications.