• Journal of information and communication convergence engineering
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• v.5 no.3
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• pp.200-204
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• 2007

The release of IEEE 802.15.4 PHY-MAC standard represents a milestone in developing of commercial wireless sensor network pursuing low power and low cost. In this paper, IEEE 802.15.4 Medium Access Control (MAC) protocol was analysed at the point of power consumption. This analysis measured the amount of the rest of power after transmitting data with beacon enabled mode and the power consumption of each node in the time period. ns-2 simulation is used to verify the analysis.

• The Journal of the Korea institute of electronic communication sciences
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• v.2 no.3
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• pp.174-179
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• 2007

In this paper, we present a optimal module selection using genetic algorithm under the power, area, delay constraint. The proposed algorithm use the way of optimal module selection it will be able to minimize power consumption. In the comparison and experimental results, The proposed application algorithm reduce maximum power saving up to 26.9% comparing to previous non application algorithm, and reduce minimum power saving up to 9.0%. It also show the average power saving up to 15.525% and proved the power saving efficiency.

• Journal of Electrical Engineering and Technology
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• v.3 no.1
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• pp.130-134
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• 2008

The increasing size of very large scale integration (VLSI) circuits, high transistor density, and popularity of low-power circuit and system design are making the minimization of power dissipation an important issue in VLSI design. Test Power dissipation is exceedingly high in scan based environments wherein scan chain transitions during the shift of test data further reflect into significant levels of circuit switching unnecessarily. Scan chain or cell modification lead to reduced dissipations of power. The ETC algorithm of previous work has weak points. Taking all of this into account, we therefore propose a new algorithm. Its name is RE_ETC. The proposed modifications in the scan chain consist of Exclusive-OR gate insertion and scan cell reordering, leading to significant power reductions with absolutely no area or performance penalty whatsoever. Experimental results confirm the considerable reductions in scan chain transitions. We show that modified scan cell has the improvement of test efficiency and power dissipations.

• The Journal of the Korea institute of electronic communication sciences
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• v.17 no.6
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• pp.1105-1112
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• 2022

Field data monitoring systems such as renewable energy generation and smart farm integrated control are developing from PC and server to mobile first, and various wireless communication and application services have emerged with the development of IoT technology. Low-power wide-area networks are services optimized for low-power, low-capacity, and low-speed data transmission, and data collected in the field is transmitted to designated storage servers or cloud-based data platforms, enabling data monitoring. In this paper, we implement an IoT repeater that collects field data with a single device and transmits it to a wireless carrier cloud data flat using a low-power wide-area network, and a monitoring app using it. Using this, the system configuration is simpler, the cost of deployment and operation is lower, and effective data accumulation is possible.

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.6
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• pp.1089-1096
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• 2019

Recently, small-scale IoT services using a small amount of information through low-performance computing have been spread. It requires low cost, low-power, and long-distance communication technologies with wide communication radius, relatively low power consumption. This paper proposes a MAC layer and routing protocol that supports multi-hop transmission in small-scale IoT environment distributed over a large area based on LoRa communication and delivering a small amount of sensing data. The terminal node is mobile and the communication type provides bidirectional transmission between the terminal node and the network application server. By applying the proposed protocol, a production line monitoring system for smart factory was implemented. It was confirmed that the basic monitoring functions are normally performed.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.15 no.4
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• pp.71-78
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• 2015

Since most education organizations such as Universities have a plenty of PCs, much electric power can be wasted if their power states are not managed properly. This paper introduces the RPM(Remote Power Management) software system implemented to reduce a waste of PC power in Universities. The System manager can monitor power state of all PCs in a University and turn off PCs or change power states of PCs to low power states. The RPM consists of three software modules. First, Power Controller, which is installed in each user PC, saves the power by changing low power state by utilizing low power algorithm proposed in this paper. Also it reports power state of its PC to Power Server on the state changed. Second, Power Server module gathers power state information of all PCs, stores them in a DB, and sends all or some parts of the information to Power Viewer whenever the manager asks. The manager can turn off or change a certain PC to low power state. We evaluated the performance of power saving for the RPM and the result showed achievement of 40% power saving.

• ETRI Journal
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• v.44 no.3
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• pp.491-503
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• 2022

Metal-oxide-semiconductor field-effect transistors (MOSFETs) are continuously scaling down in the nanoscale region to improve the functionality of integrated circuits. The scaling down of MOSFET devices causes short-channel effects in the nanoscale region. In nanoscale region, leakage current components are increasing, resulting in substantial power dissipation. Very large-scale integration designers are constantly exploring different effective methods of mitigating the power dissipation. In this study, a transistor-level input-controlled stacking (ICS) approach is proposed for minimizing significant power dissipation. A low-power ICS approach is extensively discussed to verify its importance in low-power applications. Circuit reliability is monitored for process and voltage and temperature variations. The ICS approach is designed and simulated using Cadence's tools and compared with existing low-power and high-speed techniques at a 22-nm technology node. The ICS approach decreases power dissipation by 84.95% at a cost of 5.89 times increase in propagation delay, and improves energy dissipation reliability by 82.54% compared with conventional circuit for a ring oscillator comprising 5-inverters.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.16 no.5
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• pp.1735-1754
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• 2022

The reliability and performance of WiFi need optimization because of the rising number of WiFi users day by day. A highlighted point is saving power while transmitting and receiving packets using WiFi devices. Wake-on-Wlan (WoW) is also implemented to improve energy consumption, but it also needs betterment. This paper will introduce universal ideas to transmit and receive packets using low-power technology like Bluetooth or BLE (Bluetooth low energy). While looking for power-saving ways in this research, WiFi connection and maintenance also take care using lesser power-consuming technology. Identifying different use-cases where low power technology can help save energy and maintain 802.11 connection is part of the research. In addition, the proposed method discuss energy saving with unicast and broadcast/multicast data. Calculation of power-saving and comparison with standalone WiFi usage clearly shows the effectiveness of the proposed method.

• Proceedings of the IEEK Conference
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• 2004.06a
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• pp.31-34
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• 2004

In wireless communication systems, low-power metrics is becoming a burdensome problem in the portable terminal design, because of portability constraints. This paper presents design architecture of a low-power partial correlation Digital Matched Filter for the IMT-2000 communication systems. The proposed approach focuses on efficient circuit size, power dissipation, maintaining the operating throughput. The proposed architecture was verified by using Xilinx FPGA.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.17 no.5
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• pp.193-197
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• 2017

In this paper, we present a low-power delta-sigma based digital frequency synthesizer with high frequency resolution for bio sensor networks. Biomedical radio-frequency (RF) transceivers require miniaturized forms with a long battery life and low power consumption. For the technology scaling, digital circuits have become preferable compared to analog circuits because of the aggressive cost, size, flexibility, and repeatability. Therefore, the digital circuits based on standard-cell library are used to reduce a power consumption. Additionally, a delta-sigma is used for making fractional frequency tuning range. From the simulation, we confirmed that proposed scheme has good performance in accordance with power and frequency resolution.