• Title/Summary/Keyword: Low temperature threshold

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Characteristics of Low Temperature SiNx Films Deposited by Using Highly Diluted Silane in Nitrogen (고희석 SiH4 가스를 이용하여 증착한 저온 PECVD 실리콘 질화물 박막의 기계적, 전기적 특성연구)

  • No, Kil-Sun;Keum, Ki-Su;Hong, Wan-Shick
    • Korean Journal of Metals and Materials
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    • v.50 no.8
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    • pp.613-618
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    • 2012
  • We report on electrical and mechanical properties of silicon nitride ($SiN_x$) films deposited by a plasma enhanced chemical vapor deposition (PECVD) method at $200^{\circ}C$ from $SiH_4$ highly diluted in $N_2$. The films were also prepared from $SiH_4$ diluted in He for comparison. The $N_2$ dilution was also effective in improving adhesion of the $SiN_x$ films, fascilitating construction of thin film transistors (TFTs). Metal-insulator-semiconductor (MIS) and Metal-insulator-Metal (MIM) structures were used for capacitance-voltage (C-V) and current-voltage (I-V) measurements, respectively. The resistivity and breakdown field strength of the $SiN_x$ films from $N_2$-diluted $SiH_4$ were estimated to be $1{\times}10^{13}{\Omega}{\cdot}cm$, 7.4 MV/cm, respectively. The MIS device showed a hysteresis window and a flat band voltage shift of 3 V and 0.5 V, respectively. The TFTs fabricated by using these films showed a field-effect mobility of $0.16cm^2/Vs$, a threshold voltage of 3 V, a subthreshold slope of 1.2 V/dec, and an on/off ratio of > $10^6$.

Characteristics of MODIS Satellite Data during Fog Occurrence near the Inchon International Airport

  • Yoo Jung-Moon;Kim Young-Mi;Ahn Myoung-Hwan;Kim Yong-Seung;Chung Chu-Yong
    • Journal of the Korean earth science society
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    • v.26 no.2
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    • pp.149-159
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    • 2005
  • Simultaneous observations of MODIS (Moderate-resolution Imaging Spectroradiometer) onboard the Aqua and Terra satellites and weather station at ground near the Inchon International Airport (37.2-37.7 N, 125.7-127.2 E) during the period from December 2002 to September 2004 have been utilized in order to analyze the characteristics of satellite-observed infrared (IR) and visible data under fog and clear-sky conditions, respectively. The differences $(T_{3.7-11})$ in brightness temperature between $3.75{\mu}m\;and\;11.0{\mu}m$ were used as threshold values for remote-sensing fog (or low clouds) from satellite during day and night. The $T_{3.7-11}$ value during daytime was greater by about 21 K when it was foggy than that when it was clear, but during nighttime fog it was less by 1.5 K than during nighttime clear-sky. The value was changed due to different values of emission of fog particles at the wavelength. Since the near-IR channel at $3.7{\mu}m$ was affected by solar and IR radiations in the daytime, both IR and visible channels (or reflectance) have been used to detect fog. The reflectance during fog was higher by 0.05-0.6 than that during clear-sky, and varied seasonally. In this study, the threshold values included uncertainties when clouds existed above a layer of fog.

Thin Film Transistor Characteristics with ZnO Channel Grown by RF Magnetron Sputtering (RF Magnetron Sputtering으로 증착된 ZnO의 증착 특성과 이를 이용한 Thin Film Transistor특성)

  • Kim, Young-Woong;Choi, Duck-Kyun
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.3
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    • pp.15-20
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    • 2007
  • Low temperature processed ZnO-TFTs on glass below $270^{\circ}C$ for plastic substrate applications were fabricated and their electrical properties were investigated. Films in ZnO-TFTs with bottom gate configuration were made by RF magnetron sputtering system except for $SiO_2$ gate oxide deposited by ICP-CVD. ZnO channel films were grown on glass with various Ar and $O_2$ flow ratios. All of the fabricated ZnO-TFTs showed perfectly the enhancement mode operation, a high optical transmittance of above 80% in visible ranges of the spectrum. In the ZnO-TFTs with pure Ar process, the field effect mobility, threshold voltage, and on/off ratio were measured to be $1.2\;cm^2/Vs$, 8.5 V, and $5{\times}10^5$, respectively. These characteristic values are much higher than those of the ZnO-TFTs of which ZnO channel layers were processed with additional $O_2$ gas. In addition, ZnO-TFT with pure Af process showed smaller swing voltage of 1.86v/decade compared to those with $Ar+O_2$ process.

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The Degradation Characteristics Analysis of Poly-Silicon n-TFT the Hydrogenated Process under Low Temperature (저온에서 수소 처리시킨 다결정 실리콘 n-TFT의 열화특성 분석)

  • Song, Jae-Yeol;Lee, Jong-Hyung;Han, Dae-Hyun;Lee, Yong-Jae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.9
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    • pp.1615-1622
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    • 2008
  • We have fabricated the poly-silicon thin film transistor(TFT) which has the LDD-region with graded spacer. The devices of n-channel poly-si TFT's hydrogenated by $H_2$ and $H_2$/plasma processes were fabricated for the devices reliability. We have biased the devices under the gate voltage stress conditions of maximum leakage current. The parametric characteristics caused by gate voltage stress conditions in hydrogenated devices are investigated by measuring/analyzing the drain current, leakage current, threshold voltage($V_{th}$), sub-threshold slope(S) and transconductance($G_m$) values. As a analyzed results of characteristics parameters, the degradation characteristics in hydrogenated n-channel polysilicon TFT's are mainly caused by the enhancement of dangling bonds at the poly-Si/$SiO_2$ interface and the poly-Si grain boundary due to dissolution of Si-H bonds. The structure of novel proposed poly-Si TFT's are the simplicities of the fabrication process steps and the decrease of leakage current by reduced lateral electric field near the drain region.

Thermal and Flow Analysis of a Driving Controller for Active Destruction Protections (능동 파괴 방호 구동제어기의 열 유동 해석)

  • Ryu, Bong-Jo;Oh, Bu-Jin;Kim, Youngshik
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.18 no.2
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    • pp.235-242
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    • 2017
  • A driving controller for active destruction protections can be applied to machinery, aerospace and military fields. In particular, this controller can be used to track and attack enemy flying objects through the active control. It is important to ensure reliability of the driving controller since its operation should be kept with precision to the target point. The temperature of the environment where the driving controller is used is about -32 C ~ 50 C (241~323 ). Heat generated in the driving controller should be maintained below a certain threshold (85 C (358 )) to ensure reliability; therefore, the study and analysis of the heat flow characteristics in the driving controller are required. In this research, commercial software Solid-Works Flow Simulation was used for the numerical simulation assuming a low Reynolds number turbulence model and an incompressible viscous flow. The goal of this paper is to design the driving controller safely by analyzing the characteristics of the heat flow inside of the controller composed of chips or boards. Our analysis shows temperature distributions for boards and chips below a certain threshold.

Interface Treatment Effect of High Performance Flexible Organic Thin Film Transistor (OTFT) Using PVP Gate Dielectric in Low Temperature (저온 공정 PVP게이트 절연체를 이용한 고성능 플렉서블 유기박막 트랜지스터의 계면처리 효과)

  • Yun, Ho-Jin;Baek, Kyu-Ha;Shin, Hong-Sik;Lee, Ga-Won;Lee, Hi-Deok;Do, Lee-Mi
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.1
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    • pp.12-16
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    • 2011
  • In this study, we fabricated the flexible pentacene TFTs with the polymer gate dielectric and contact printing method by using the silver nano particle ink as a source/drain material on plastic substrate. In this experiment, to lower the cross-linking temperature of the PVP gate dielectric, UV-Ozone treatment has been used and the process temperature is lowered to $90^{\circ}C$ and the surface is optimized by various treatment to improve device characteristics. We tried various surface treatments; $O_2$ Plasma, hexamethyl-disilazane (HMDS) and octadecyltrichlorosilane (OTS) treatment methods of gate dielectric/semiconductor interface, which reduces trap states such as -OH group and grain boundary in order to improve the OTFTs properties. The optimized OTFT shows the device performance with field effect mobility, on/off current ratio, and the sub-threshold slope were extracted as $0.63cm^2 V^{-1}s^{-1}$, $1.7{\times}10^{-6}$, and of 0.75 V/decade, respectively.

p-type CuI Thin-Film Transistors through Chemical Vapor Deposition Process (Chemical Vapor Deposition 공정으로 제작한 CuI p-type 박막 트랜지스터)

  • Seungmin Lee;Seong Cheol Jang;Ji-Min Park;Soon-Gil Yoon;Hyun-Suk Kim
    • Korean Journal of Materials Research
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    • v.33 no.11
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    • pp.491-496
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    • 2023
  • As the demand for p-type semiconductors increases, much effort is being put into developing new p-type materials. This demand has led to the development of novel new p-type semiconductors that go beyond existing p-type semiconductors. Copper iodide (CuI) has recently received much attention due to its wide band gap, excellent optical and electrical properties, and low temperature synthesis. However, there are limits to its use as a semiconductor material for thin film transistor devices due to the uncontrolled generation of copper vacancies and excessive hole doping. In this work, p-type CuI semiconductors were fabricated using the chemical vapor deposition (CVD) process for thin-film transistor (TFT) applications. The vacuum process has advantages over conventional solution processes, including conformal coating, large area uniformity, easy thickness control and so on. CuI thin films were fabricated at various deposition temperatures from 150 to 250 ℃ The surface roughness root mean square (RMS) value, which is related to carrier transport, decreases with increasing deposition temperature. Hall effect measurements showed that all fabricated CuI films had p-type behavior and that the Hall mobility decreased with increasing deposition temperature. The CuI TFTs showed no clear on/off because of the high concentration of carriers. By adopting a Zn capping layer, carrier concentrations decreased, leading to clear on and off behavior. Finally, stability tests of the PBS and NBS showed a threshold voltage shift within ±1 V.

Fabrication of Vertically Aligned GaN Nanostructures and Their Field Emission Property

  • Jo, Jong-Hoe;Kim, Je-Hyeong;Jo, Yong-Hun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.281-281
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    • 2014
  • The field emission properties of GaN are reported in the present study. To be a good field emitter, it requires a low work function, high aspect ratio, and strong mechanical stability. In the case of GaN, it has a quite low work function (4.1eV) and strong chemical/mechanical/thermal stabilities. However, so far, it was difficult to fabricate vertical GaN nanostructures with a high aspect ratio. In this study, we successfully achieved vertically well aligned GaN nanostructures with chemical vapor-phase etching methods [1] (Fig. 1). In this method, we chemically etched the GaN film using hydrogen chloride and ammonia gases at high temperature around $900^{\circ}C$. This process effectively forms vertical nanostructures without patterning procedure. This favorable shape of GaN nanostructures for electron emitting results in excellent field emission properties such as a low turn-on field and long term stability. In addition, we observed a uniform fluorescence image from a phosphor film attached at the anode part. The turn-on field for the GaN nanostructures is found to be about $0.8V/{\mu}m$ at current density of $20{\mu}A$/cm^2. This value is even lower than that of typical carbon nanotubes ($1V/{\mu}m$). Moreover, threshold field is $1.8V/{\mu}m$ at current density of $1mA$/cm^2. The GaN nanostructures achieved a high current density within a small applied field range. We believe that our chemically etched vertical nanostructures are the promising structures for various field emitting devices.

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A Low Power, Wide Tuning Range VCO with Two-Step Negative-Gm Calibration Loop (2단계 자동 트랜스컨덕턴스 조절 기능을 가진 저전력, 광대역 전압제어 발진기의 설계)

  • Kim, Sang-Woo;Park, Joon-Sung;Pu, Young-Gun;Hur, Jeong;Lee, Kang-Yoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.2
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    • pp.87-93
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    • 2010
  • This paper presents a low-power, wide tuning range VCO with automatic two-step negative-Gm calibration loop to compensate for the process, voltage and temperature variation. To cover the wide tuning range, digital automatic negative-Gm tuning loop and analog automatic amplitude calibration loop are used. Adaptive body biasing (ABB) technique is also adopted to minimize the power consumption by lowering the threshold voltage of transistors in the negative-Gm core. The power consumption is 2 mA to 6mA from a 1.2 V supply. The VCO tuning range is 2.65 GHz, from 2.35 GHz to 5 GHz. And the phase noise is -117 dBc/Hz at the 1 MHz offset when the center frequency is 3.2 GHz.

A UHF-band Passive Temperature Sensor Tag Chip Fabricated in $0.18-{\mu}m$ CMOS Process ($0.18-{\mu}m$ CMOS 공정으로 제작된 UHF 대역 수동형 온도 센서 태그 칩)

  • Pham, Duy-Dong;Hwang, Sang-Kyun;Chung, Jin-Yong;Lee, Jong-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.10
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    • pp.45-52
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    • 2008
  • We investigated the design of an RF-powered, wireless temperature sensor tag chip using $0.18-{\mu}m$ CMOS technology. The transponder generates its own power supply from small incident RF signal using Schottky diodes in voltage multiplier. Ambient temperature is measured using a new low-power temperature-to-voltage converter, and an 8-bit single-slope ADC converts the measured voltage to digital data. ASK demodulator and digital control are combined to identify unique transponder (ID) sent by base station for multi-transponder applications. The measurement of the temperature sensor tag chip showed a resolution of $0.64^{\circ}C/LSB$ in the range from $20^{\circ}C$ to $100^{\circ}C$, which is suitable for environmental temperature monitoring. The chip size is $1.1{\times}0.34mm^2$, and operates at clock frequency of 100 kHz while consuming $64{\mu}W$ power. The temperature sensor required a -11 dBm RF input power, supported a conversion rate of 12.5 k-samples/sec, and a maximum error of $0.5^{\circ}C$.